Powerstrap doc

doc/Hammer-Use/Hammer-APIs.rst

@@ -33,7 +33,59 @@ Pin constraints are specified using the Hammer IR key ``vlsi.inputs.pin``. PinAs
 
 Power Straps
 ------------
-Power strap constraints are specified using multiple Hammer IR keys in the ``par`` namespace. The currently supported API supports power strap generation by tracks, which auto-calculates power strap width, spacing, set-to-set distance, and offsets based on basic DRC rules specified in the technology Stackup object. The basic pieces of information needed are the desired track utilization per strap and overall power strap density. Different values can be specified on a layer-by-layer basis by appending ``_<layer name>`` to the end of the desired option.
+Power strap constraints are specified using multiple Hammer IR keys in the ``par`` namespace.You can find the keys in <tech>/defaults.yml under the tech plugin directory. An example from `asap7 <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/asap7/defaults.yml>`__ is as follows:
+
+.. literalinclude:: ../../hammer/technology/asap7/defaults.yml
+   :language: yaml
+   :linenos:
+   :lines: 59-80
+   :caption: ASAP7 default power straps setting
+..
+
+The default keys for all hammer configs are defined in the `defaults.yml <https://github.com/ucb-bar/hammer/blob/master/hammer/config/defaults.yml>`__, which contains detailed comments on what each key does. Here is the default setting and parameter descriptions for power strap generation.
+
+.. literalinclude:: ../../hammer/config/defaults.yml
+   :language: yaml
+   :linenos:
+   :lines: 570-604
+   :caption: Hammer global default power straps setting
+..
+
+The currently supported API supports power strap generation by tracks, which auto-calculates power strap width, spacing, set-to-set distance, and offsets based on basic DRC rules specified in the technology Stackup object. 
+
+The technology Stackup information (“stackups”) can be found in the <tech>.tech.json file under the tech plugin directory. The “stackups” usually are located near the end of the <tech> ``.tech.json`` file. An example from `asap7 <(https://github.com/ucb-bar/hammer/blob/master/hammer/technology/asap7/asap7.tech.json>`__ is as follows:
+
+.. literalinclude:: ../../hammer/technology/asap7/asap7.tech.json
+   :language: json
+   :linenos:
+   :lines: 1364-1381
+   :caption: ASAP7 stackup object
+..
+
+The keys in the Stackup object are defined in `stackup.py <https://github.com/ucb-bar/hammer/blob/master/hammer/tech/stackup.py>`__ as follows.
+
+.. literalinclude:: ../../hammer/tech/stackup.py
+   :language: none
+   :linenos:
+   :lines: 79-98
+   :caption: Description for a metal layer/stackup
+..
+
+The basic pieces of information needed are the desired track utilization per strap and overall power strap density. Powerstraps are routed in pairs of Vdd and Vss. Based on the effective power utilization and track spacing, there are three ways to route powerstraps.
+
+For track spacing = 0 and effective power utilization = 100%, powerstraps are routed as follows.
+
+.. image:: strap_100util.png
+
+For track spacing = 0 and effective power utilization < 100%, powerstraps are routed as follows.
+
+.. image:: strap_0spacing_not100util.png
+
+For track spacing > 0 and effective power utilization < 100%, powerstraps are routed as follows.
+
+.. image:: strap_not0spacing_not100util.png
+
+The currently supported API supports power strap generation by tracks, which auto-calculates power strap width, spacing, set-to-set distance, and offsets based on basic DRC rules specified in the technology Stackup object. The basic pieces of information needed are the desired track utilization per strap and overall power strap density. Different values can be specified on a layer-by-layer basis by appending ``_<layer name>`` to the end of the desired option.
 
 Special Cells
 -------------

hammer/tech/stackup.py

@@ -84,7 +84,11 @@ class Metal(BaseModel):
     min_width: The minimum wire width for this layer.
     max_width: The maximum wire width for this layer.
     pitch: The minimum cross-mask pitch for this layer (NOT same-mask pitch
-           for multiple-patterned layers).
+           for multiple-patterned layers). Width of routing grid for a given layer. 
+           To route denser wires on chip, multiple masks are required. 
+           During fabrication, the masks are applied separately with some spatial offsets 
+           to achieve denser line patterning. For more information on multiple-patterning, 
+           check https://en.wikipedia.org/wiki/Multiple_patterning
     offset: The routing track offset from the origin for the first track in this layer.
             (0 = first track is on an axis).
     power_strap_widths_and_spacings: A list of WidthSpacingTuples that specify the minimum