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quickstart/logicvector example (Bounded) #6

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22b3d72
initial logic vector example
Apr 13, 2020
8cc6d3a
Done u/logic array example: todo use logic_vector
Apr 13, 2020
5aac200
Use std_(u)logic_vectors: ghdl/ghdl/issues/1224
Apr 13, 2020
5ef361f
Move to quickstart
Apr 14, 2020
e1e7e39
Simplify quickstart/logicvectors
Apr 14, 2020
ad9d3f7
Revision 2: 2 vecs, cleaned vhdl, #defined sizes
Apr 15, 2020
b2c8317
Bounded 2D array working
Apr 15, 2020
47cd823
Remove 2D array_C
Apr 15, 2020
35e07dd
Whitespace rules
Apr 16, 2020
6c376bc
Switch getVectorSize()
Apr 17, 2020
cf7c17b
Swap names HDL_LOGIC_STATE/CHAR
Apr 17, 2020
dd8f83e
caux
Apr 17, 2020
e821c8e
Logic Vector documentation
Apr 17, 2020
b67c73e
Merge branch 'master' into logicVectors
radonnachie Apr 17, 2020
a1f29bc
caux.c
Apr 17, 2020
2110723
Add to windows test
radonnachie Apr 17, 2020
386470b
Doc Rev1
radonnachie Apr 17, 2020
b537f2b
Missing 'the'
radonnachie Apr 17, 2020
95a760d
vhpidirect: add 'quickstart/package'
radonnachie Apr 17, 2020
276affa
Merge branch 'master' into logicVectors
radonnachie Apr 18, 2020
effe73d
Update VHDL Boolean parsing In C
radonnachie Apr 18, 2020
c7a3df1
Move to arrays, including documentation
radonnachie Apr 18, 2020
5adf1cc
Doc Rev
radonnachie Apr 18, 2020
60f8e85
Illustrative purposes
radonnachie Apr 18, 2020
54746cc
Doc Rev2
radonnachie Apr 19, 2020
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Merge branch 'master' into logicVectors
radonnachie Apr 19, 2020
f77ad0d
Fix example details order
radonnachie Apr 19, 2020
316da8d
Merge branch 'logicVectors' of https://github.com/RocketRoss/ghdl-cos…
radonnachie Apr 19, 2020
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37 changes: 37 additions & 0 deletions doc/vhpidirect/examples/quickstart.rst
Original file line number Diff line number Diff line change
Expand Up @@ -42,3 +42,40 @@ When the required functionality is not available in pre-built libraries, custom
This example shows how to bind custom C functions in VHDL as either procedures or functions. Four cases are included: ``custom_procedure``, ``custom_procedure_withargs``, ``custom_function`` and ``custom_function_withargs``. In all cases, the parameters are defined as integers, in order to keep it simple. See :ref:`COSIM:VHPIDIRECT:Declarations` for further details.

Since either C sources or pre-compiled ``.o`` objects can be added, in C/C++ projects of moderate complexity, it might be desirable to merge all the C sources in a single object before elaborating the design.

:cosimtree:`logicvectors <vhpidirect/quickstart/logicvectors>`
**************************************************************

Commonly signals in VHDL are of a logic type or a vector thereof (``std_logic`` and ``std_logic_vector``), coming from the ``ieee.std_logic_1164.*`` package.
Because logic values are more than high and low (``1`` and ``0``), the VHDL values of logic types (``std_logic`` and ``std_ulogic``) are enumrations:
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0. 'U'
1. 'X'
2. '0'
3. '1'
4. 'Z'
5. 'W'
6. 'L'
7. 'H'
8. '-'

Because number of enumeration values is less than 256, logic values are transported in 8 bit words (a ``char`` type in C).
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Logic vectors, of a bounded size, are easily created in C and passed to VHDL as ``char[]``. VHDL receives pointers as ``access`` types, in this case an access of a subtype of std_logic_vector.
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Providing logic values in C as their enumeration numbers is simplified with the use of a matching enumeration, provided as ``HDL_LOGIC_STATES``. Printing out a logic value's associated character is also simplified with the provided ``const char HDL_LOGIC_CHAR[]``.
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This example declares foreign subprograms that enable receiving the size of two different logic vectors as well as the vectors themselves from C. The two vectors are populated with logic values in different ways:
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- LogicVectorA's indices are manually filled with enumeration values from HDL_LOGIC_STATES.

- .. code-block:: C

logic_vec_A[0] = HDL_U;

- LogicVectorB's indices are filled with an integer value. **The integer values must be limited to [0, 8]**.
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- .. code-block:: C

for(int i = 0; i < SIZE_LOGIC_VEC_B; i++){
logic_vec_B[i] = 8-i;
}
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

static const char HDL_LOGIC_CHAR[] = { 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-'};

enum HDL_LOGIC_STATE {
enum HDL_LOGIC_STATES {
HDL_U = 0,
HDL_X = 1,
HDL_0 = 2,
Expand All @@ -27,7 +27,7 @@ int getLogicVecSize(int returnA){
}

char* getLogicVecA(){
//The HDL_LOGIC_STATE enum is used
//The HDL_LOGIC_STATES enum is used
logic_vec_A[0] = HDL_U;
logic_vec_A[1] = HDL_X;
logic_vec_A[2] = HDL_0;
Expand All @@ -41,7 +41,7 @@ char* getLogicVecA(){
}

char* getLogicVecB(){
//The equivalent value of HDL_LOGIC_STATE is used
//The equivalent value of HDL_LOGIC_STATES is used
printf("B: 1D Array Logic Values [%ld]:\n", SIZE_LOGIC_VEC_B);
for(int i = 0; i < SIZE_LOGIC_VEC_B; i++){
logic_vec_B[i] = 8-i;//The last 'SIZE_LOGIC_VEC_B' HDL_LOGIC values, in reverse order.
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