Add arguments to control the network bandwidth number in a reasonable way

[ywwu928]

Description

1. Core will issue 8B per cycle
2. BW out of all cores should match BW out of memory
   --> bank * mem BW = core * tile rtr BW
3. On chip rtr BW is accumulation of all ports
4. Off chipt rtr BW is on chip rtr BW * pxns
   The above is ideal network that will probably not be network wounded but only memory bounded.
   Add arguments to set on chip rtr BW and off chip rtr BW directly if want to experiment with them.

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Checklist

• The additions follow the code standards in the developer guide.
• New or existing tests cover these changes.
• The documentation is up to date with these changes.