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Merge #2224
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2224: Cranelift: enable SIMD based on actual Wasm features r=syrusakbary a=jubianchi

# Review

- [ ] Add a short description of the the change to the CHANGELOG.md file


Co-authored-by: jubianchi <julien@wasmer.io>
Co-authored-by: Syrus Akbary <me@syrusakbary.com>
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3 people authored Mar 31, 2021
2 parents 01cf8e8 + 09ce851 commit affa156
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Showing 2 changed files with 17 additions and 26 deletions.
8 changes: 5 additions & 3 deletions lib/compiler-cranelift/src/compiler.rs
Original file line number Diff line number Diff line change
Expand Up @@ -60,12 +60,14 @@ impl Compiler for CraneliftCompiler {
module_translation_state: &ModuleTranslationState,
function_body_inputs: PrimaryMap<LocalFunctionIndex, FunctionBodyData<'_>>,
) -> Result<Compilation, CompileError> {
let isa = self.config().isa(target);
let config = self.config();
let flags = self.config().flags(compile_info.features.simd);
let isa = config.isa(target, flags);
let frontend_config = isa.frontend_config();
let memory_styles = &compile_info.memory_styles;
let table_styles = &compile_info.table_styles;
let mut module = (*compile_info.module).clone();
self.config.middlewares.apply_on_module_info(&mut module);
config.middlewares.apply_on_module_info(&mut module);
compile_info.module = Arc::new(module);
let module = &compile_info.module;
let signatures = module
Expand Down Expand Up @@ -126,7 +128,7 @@ impl Compiler for CraneliftCompiler {
&mut context.func,
&mut func_env,
*i,
&self.config,
&config,
)?;

let mut code_buf: Vec<u8> = Vec::new();
Expand Down
35 changes: 12 additions & 23 deletions lib/compiler-cranelift/src/config.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@ pub enum CraneliftOptLevel {
pub struct Cranelift {
enable_nan_canonicalization: bool,
enable_verifier: bool,
enable_simd: bool,
enable_pic: bool,
opt_level: CraneliftOptLevel,
/// The middleware chain.
Expand All @@ -48,7 +47,6 @@ impl Cranelift {
enable_verifier: false,
opt_level: CraneliftOptLevel::Speed,
enable_pic: false,
enable_simd: true,
middlewares: vec![],
}
}
Expand All @@ -62,20 +60,14 @@ impl Cranelift {
self
}

/// Enable SIMD support.
pub fn enable_simd(&mut self, enable: bool) -> &mut Self {
self.enable_simd = enable;
self
}

/// The optimization levels when optimizing the IR.
pub fn opt_level(&mut self, opt_level: CraneliftOptLevel) -> &mut Self {
self.opt_level = opt_level;
self
}

/// Generates the ISA for the provided target
pub fn isa(&self, target: &Target) -> Box<dyn TargetIsa> {
pub fn isa(&self, target: &Target, flags: settings::Flags) -> Box<dyn TargetIsa> {
let mut builder =
lookup(target.triple().clone()).expect("construct Cranelift ISA for triple");
// Cpu Features
Expand Down Expand Up @@ -126,11 +118,11 @@ impl Cranelift {
builder.enable("has_lzcnt").expect("should be valid flag");
}

builder.finish(self.flags())
builder.finish(flags)
}

/// Generates the flags for the compiler
pub fn flags(&self) -> settings::Flags {
pub fn flags(&self, enable_simd: bool) -> settings::Flags {
let mut flags = settings::builder();

// There are two possible traps for division, and this way
Expand All @@ -153,21 +145,18 @@ impl Cranelift {
.set("enable_verifier", enable_verifier)
.expect("should be valid flag");

let opt_level = if self.enable_simd {
"none"
} else {
match self.opt_level {
CraneliftOptLevel::None => "none",
CraneliftOptLevel::Speed => "speed",
CraneliftOptLevel::SpeedAndSize => "speed_and_size",
}
};

flags
.set("opt_level", opt_level)
.set(
"opt_level",
match self.opt_level {
CraneliftOptLevel::None => "none",
CraneliftOptLevel::Speed => "speed",
CraneliftOptLevel::SpeedAndSize => "speed_and_size",
},
)
.expect("should be valid flag");

let enable_simd = if self.enable_simd { "true" } else { "false" };
let enable_simd = if enable_simd { "true" } else { "false" };
flags
.set("enable_simd", enable_simd)
.expect("should be valid flag");
Expand Down

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