Add Atomics access OpCodes to Aarch64/Singlepass Compiler #3159
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Nov 29, 2022
3153: SharedMemory & Atomics r=ptitSeb a=ptitSeb # Description Enabled SharedMemory and the Atomics extension proposal - [x] Enable Atomic extension by default - [x] Fix "imports" tests #3154 - [x] Add function for memory.atomic.wait32, memory.atomic.wait64 and memory.atomic.notify opcodes #3155 - [x] Add support for the new wait/notify opcodes in Cranelift compiler #3156 - [x] Add support for the new wait/notify opcodes in LLVM compiler #3157 - [x] Add support for atomic access opcodes in AArch64/Singlepass compiler #3159 - [x] Add support for the new wait/notify opcodes in Singlepass compiler #3158 - [x] Fix Atomic issues on x86_64 Singlepass compiler not related to Wait/Notify opcodes #3161 - [x] Fix Atomic issues on Cranelift compiler not related to Wait/Notify opcodes #3162 - [x] Fix Atomic issues on LLVM compiler not related to Wait/Notify opcodes #3163 - [x] Fix the ticket #3167 on Cranelift For #3304 Co-authored-by: John Sharratt's Shared Account <johnathan.sharratt@gmail.com> Co-authored-by: ptitSeb <sebastien.chev@gmail.com> Co-authored-by: Syrus Akbary <me@syrusakbary.com>
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Motivation
The Aarch64 backend of the Singlepass compiler doesn't have Atomic access implemented yet (x86_64 backend have the opcodes)
Proposed solution
The opcodes should be added to the Aarch64 backend. Infrastructure is there, but the opcodes them selfves are
unimplemented()at the moment.This is needed by #3158
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