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Fixes for Xilinx Zynq #499

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Fixes for Xilinx Zynq #499

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175aa0b
Fixes to support wolfBoot native make and gcc-arm cross compiler for …
dgarske Aug 22, 2024
8df8f8e
Adjust wolfBoot linker script and documentation about exception level.
dgarske Aug 23, 2024
23c5076
Fixes for QSPI driver.
dgarske Aug 23, 2024
2890ef4
Fixed issue with Xilinx XMSS IMAGE_HEADER_SIZE in documentation. It s…
dgarske Sep 17, 2024
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14 changes: 11 additions & 3 deletions IDE/XilinxSDK/README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -91,9 +91,13 @@ Xilinx uses a `bootgen` tool for generating a boot binary image that has Xilinx
* Use "offset=" option to place the application into a specific location in flash.
* Use "load=" option to have FSBL load into specific location in RAM.

Generating a boot.bin (from boot.bif).
Run the Xilinx -> Vitis Shell and cd into the workspace root.
Default install locations for bootgen tools:
* Linux: `/tools/Xilinx/Vitis/2022.1/bin`
* Windows: `C:\Xilinx\Vitis\2022.1\bin`

Open the Vitis Shell from the IDE by using file menu "Xilinx" -> "Vitis Shell".

Generating a boot.bin (from boot.bif).
Example boot.bif in workspace root:

```
Expand All @@ -107,6 +111,10 @@ the_ROM_image:
}
```

Note: If using the wolfboot.elf compiled from our makefile use "exception_level=el-3".

From the workspace root:

```sh
bootgen -image boot.bif -arch zynqmp -w -o BOOT.bin

Expand Down Expand Up @@ -207,7 +215,7 @@ WOLFSSL_XMSS_VERIFY_ONLY
WOLFSSL_XMSS_MAX_HEIGHT=32
WOLFBOOT_SHA_BLOCK_SIZE=4096
IMAGE_SIGNATURE_SIZE=2500
IMAGE_HEADER_SIZE=4096
IMAGE_HEADER_SIZE=5000
```

2) Create and sign image:
Expand Down
160 changes: 84 additions & 76 deletions arch.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -54,18 +54,34 @@ ifeq ($(ARCH),x86_64)
endif
endif

## ARM
## ARM Cortex-A
ifeq ($(ARCH),AARCH64)
CROSS_COMPILE?=aarch64-none-elf-
CFLAGS+=-DARCH_AARCH64 -march=armv8-a
OBJS+=src/boot_aarch64.o src/boot_aarch64_start.o
CFLAGS+=-DNO_QNX
CFLAGS+=-DARCH_AARCH64
OBJS+=src/boot_aarch64.o src/boot_aarch64_start.o src/boot_aarch64_vectors.o src/boot_aarch64_translation.o

ifeq ($(TARGET),zynq)
CFLAGS+=-march=armv8-a+crypto -DCORTEX_A53
CFLAGS+=-DNO_QNX

# Support detection and skip of U-Boot legecy header */
CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
CFLAGS+=-DWOLFBOOT_DUALBOOT
endif

ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_arm64.o
endif
ifeq ($(NO_ASM),0)
ARCH_FLAGS=-mstrict-align
CFLAGS+=$(ARCH_FLAGS) -DWOLFSSL_ARMASM -DWC_HASH_DATA_ALIGNMENT=8
WOLFCRYPT_OBJS += lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o \
lib/wolfssl/wolfcrypt/src/port/arm/armv8-aes.o
endif
endif

## ARM Cortex-M
ifeq ($(ARCH),ARM)
CROSS_COMPILE?=arm-none-eabi-
CFLAGS+=-mthumb -mlittle-endian -mthumb-interwork -DARCH_ARM
Expand Down Expand Up @@ -137,7 +153,6 @@ ifeq ($(ARCH),ARM)
endif
endif


ifeq ($(TARGET),stm32l5)
CORTEX_M33=1
CFLAGS+=-Ihal
Expand Down Expand Up @@ -177,93 +192,92 @@ ifeq ($(ARCH),ARM)
endif

## Cortex-M CPU
ifeq ($(CORTEX_M33),1)
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33
LDFLAGS+=-mcpu=cortex-m33
ifeq ($(TZEN),1)
OBJS+=hal/stm32_tz.o
CFLAGS+=-mcmse
ifeq ($(WOLFCRYPT_TZ),1)
SECURE_OBJS+=./src/wc_callable.o
SECURE_OBJS+=./lib/wolfssl/wolfcrypt/src/random.o
CFLAGS+=-DWOLFCRYPT_SECURE_MODE
SECURE_LDFLAGS+=-Wl,--cmse-implib -Wl,--out-implib=./src/wc_secure_calls.o
endif
endif # TZEN=1
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
ifeq ($(NO_ASM),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
ifeq ($(CORTEX_M33),1)
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33
LDFLAGS+=-mcpu=cortex-m33
ifeq ($(TZEN),1)
OBJS+=hal/stm32_tz.o
CFLAGS+=-mcmse
ifeq ($(WOLFCRYPT_TZ),1)
SECURE_OBJS+=./src/wc_callable.o
SECURE_OBJS+=./lib/wolfssl/wolfcrypt/src/random.o
CFLAGS+=-DWOLFCRYPT_SECURE_MODE
SECURE_LDFLAGS+=-Wl,--cmse-implib -Wl,--out-implib=./src/wc_secure_calls.o
endif
endif
else
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
ifeq ($(CORTEX_M7),1)
CFLAGS+=-mcpu=cortex-m7
LDFLAGS+=-mcpu=cortex-m7
ifeq ($(SPMATH),1)
ifeq ($(NO_ASM),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
endif # TZEN=1
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
ifeq ($(NO_ASM),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
ifeq ($(CORTEX_M0),1)
CFLAGS+=-mcpu=cortex-m0
LDFLAGS+=-mcpu=cortex-m0
ifeq ($(CORTEX_M7),1)
CFLAGS+=-mcpu=cortex-m7
LDFLAGS+=-mcpu=cortex-m7
ifeq ($(SPMATH),1)
ifeq ($(NO_ASM),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_THUMB_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_armthumb.o
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
ifeq ($(CORTEX_M3),1)

CFLAGS+=-mcpu=cortex-m3
LDFLAGS+=-mcpu=cortex-m3
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
ifeq ($(CORTEX_M0),1)
CFLAGS+=-mcpu=cortex-m0
LDFLAGS+=-mcpu=cortex-m0
ifeq ($(SPMATH),1)
ifeq ($(NO_ASM),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_THUMB_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_armthumb.o
endif
else
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -DWOLFSSL_SP_NO_UMAAL
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
# default Cortex M4
CFLAGS+=-mcpu=cortex-m4
LDFLAGS+=-mcpu=cortex-m4
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
endif
else
CFLAGS+=-fomit-frame-pointer # required with debug builds only
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
ifeq ($(CORTEX_M3),1)
CFLAGS+=-mcpu=cortex-m3
LDFLAGS+=-mcpu=cortex-m3
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
endif
else
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -DWOLFSSL_SP_NO_UMAAL
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
else
# default Cortex M4
CFLAGS+=-mcpu=cortex-m4
LDFLAGS+=-mcpu=cortex-m4
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
endif
else
CFLAGS+=-fomit-frame-pointer # required with debug builds only
ifeq ($(SPMATH),1)
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
endif
endif
endif
endif
endif
endif
endif
endif
endif

ifeq ($(TZEN),1)
CFLAGS+=-DTZEN
Expand Down Expand Up @@ -698,12 +712,6 @@ ifeq ($(TARGET),nxp_p1021)
SPI_TARGET=nxp
endif

ifeq ($(TARGET),zynq)
# Support detection and skip of U-Boot legecy header */
CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
CFLAGS+=-DWOLFBOOT_DUALBOOT
endif

ifeq ($(TARGET),ti_hercules)
# HALCoGen Source and Include?
CORTEX_R5=1
Expand Down
11 changes: 0 additions & 11 deletions hal/raspi3.c
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Original file line number Diff line number Diff line change
Expand Up @@ -86,17 +86,6 @@ void* hal_get_dts_update_address(void)
return NULL; /* Not yet supported */
}

/* QSPI functions */
void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
{
}


void zynq_init(uint32_t cpu_clock)
{
}



/* public HAL functions */
void hal_init(void)
Expand Down
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