UCT/IB/DEVX: Set modify-QP global address parameters only for GRH case

1. Back-port master/RP/6061 to integration3 branch
2. This is required by "address path structure fields"
   1) hop_limit:
      For IB and RoCE version 1.0: GRH Hop Limit.
   2) rgid_or_rip:
      For IB port - Valid if the GRH bit is set.
      For an Ethernet port for RoCE mode, this field must always be valid and
      contain the remote GID address.
   3) traffic class:
      For InfiniBand and RoCE v1.0: GRH TClass
3. According to IB Spec:
   1) Address vector, for UD transports only, containing:
      For global destination:
         • Flow label.
         • Hop limit.
         • Traffic class.
         • Source GID index.
   2) Address vector, for RC & UC transports only, containing:
      For global destination:
         • Traffic class.
         • Flow label.
         • Hop limit.
         • Source GID index.
         • Destination’s GID.

Signed-off-by: Changcheng Liu <jerrliu@nvidia.com>

src/uct/ib/rc/accel/rc_mlx5_devx.c

@@ -261,16 +261,19 @@ uct_rc_mlx5_iface_common_devx_connect_qp(uct_rc_mlx5_iface_common_t *iface,
         UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.rlid, ah_attr->dlid);
         UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.mlid,
                           ah_attr->src_path_bits & 0x7f);
-        UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.hop_limit,
-                          ah_attr->grh.hop_limit);
-        memcpy(UCT_IB_MLX5DV_ADDR_OF(qpc, qpc, primary_address_path.rgid_rip),
-               &ah_attr->grh.dgid,
-               UCT_IB_MLX5DV_FLD_SZ_BYTES(qpc, primary_address_path.rgid_rip));
         UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.sl,
                           iface->super.super.config.sl);
-        /* TODO add flow_label support */
-        UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.tclass,
-                          iface->super.super.config.traffic_class);
+
+	if (ah_attr->is_global) {
+            UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.hop_limit,
+                              ah_attr->grh.hop_limit);
+            memcpy(UCT_IB_MLX5DV_ADDR_OF(qpc, qpc, primary_address_path.rgid_rip),
+                   &ah_attr->grh.dgid,
+                   UCT_IB_MLX5DV_FLD_SZ_BYTES(qpc, primary_address_path.rgid_rip));
+            /* TODO: add flow_label support */
+            UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.tclass,
+                              iface->super.super.config.traffic_class);
+	}
     }
 
     UCT_IB_MLX5DV_SET(qpc, qpc, primary_address_path.vhca_port_num, ah_attr->port_num);