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dts: arm: st: Add SOC support for STM32G473
This commit adds SOC support for STM32G473 MCUs Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
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/* | ||
* Copyright (c) 2021 Guðni Már Gilbert | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <st/g4/stm32g4.dtsi> | ||
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/ { | ||
soc { | ||
dma1: dma@40020000 { | ||
interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0 96 0>; | ||
dma-requests = <8>; | ||
}; | ||
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dma2: dma@40020400 { | ||
interrupts = <56 0 57 0 58 0 59 0 60 0 97 0 98 0 99 0>; | ||
dma-requests = <8>; | ||
dma-offset = <8>; | ||
}; | ||
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dmamux1: dmamux@40020800 { | ||
dma-channels = <16>; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Copyright (c) 2021 Guðni Már Gilbert | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <st/g4/stm32g473.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(128)>; | ||
}; | ||
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soc { | ||
flash-controller@40022000 { | ||
flash0: flash@8000000 { | ||
reg = <0x08000000 DT_SIZE_K(128)>; | ||
}; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Copyright (c) 2021 Guðni Már Gilbert | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <st/g4/stm32g473.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(128)>; | ||
}; | ||
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soc { | ||
flash-controller@40022000 { | ||
flash0: flash@8000000 { | ||
reg = <0x08000000 DT_SIZE_K(256)>; | ||
}; | ||
}; | ||
}; | ||
}; |
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/* | ||
* Copyright (c) 2021 Guðni Már Gilbert | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include <st/g4/stm32g473.dtsi> | ||
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/ { | ||
sram0: memory@20000000 { | ||
reg = <0x20000000 DT_SIZE_K(128)>; | ||
}; | ||
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soc { | ||
flash-controller@40022000 { | ||
flash0: flash@8000000 { | ||
reg = <0x08000000 DT_SIZE_K(512)>; | ||
}; | ||
}; | ||
}; | ||
}; |
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# STMicroelectronics STM32G473XX MCU | ||
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# Copyright (c) 2021 Guðni Már Gilbert | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if SOC_STM32G473XX | ||
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config SOC | ||
default "stm32g473xx" | ||
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config NUM_IRQS | ||
default 102 | ||
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endif # SOC_STM32G473XX |
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