soc: intel_adsp: ace: set xtensa ccount per platform

XTENSA_CCOUNT_HZ is no longer common to ACE soc series This will fix Hz value for ACE30 platform Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
zephyrproject-rtos · Aug 14, 2024 · 784bc06 · 784bc06
1 parent bbcf23e
commit 784bc06
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Showing 4 changed files with 21 additions and 7 deletions.
diff --git a/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace15_mtpm b/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace15_mtpm
@@ -6,4 +6,11 @@ if SOC_INTEL_ACE15_MTPM
 config MP_MAX_NUM_CPUS
 	default 3
 
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 393216000 if XTENSA_TIMER
+	default 38400000 if INTEL_ADSP_TIMER
+
+config XTENSA_CCOUNT_HZ
+	default 393216000
+
 endif
diff --git a/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace20_lnl b/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace20_lnl
@@ -6,4 +6,11 @@ if SOC_INTEL_ACE20_LNL
 config MP_MAX_NUM_CPUS
 	default 5
 
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 393216000 if XTENSA_TIMER
+	default 38400000 if INTEL_ADSP_TIMER
+
+config XTENSA_CCOUNT_HZ
+	default 393216000
+
 endif
diff --git a/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace30_ptl b/soc/intel/intel_adsp/ace/Kconfig.defconfig.ace30_ptl
@@ -7,6 +7,13 @@ if SOC_INTEL_ACE30_PTL
 config MP_MAX_NUM_CPUS
 	default 5
 
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 442368000 if XTENSA_TIMER
+	default 38400000 if INTEL_ADSP_TIMER
+
+config XTENSA_CCOUNT_HZ
+	default 442368000
+
 config CPU_HAS_MMU
 	def_bool y
 

diff --git a/soc/intel/intel_adsp/ace/Kconfig.defconfig.series b/soc/intel/intel_adsp/ace/Kconfig.defconfig.series
@@ -40,16 +40,9 @@ config XTENSA_TIMER
 config XTENSA_TIMER_ID
 	default 0
 
-config SYS_CLOCK_HW_CYCLES_PER_SEC
-	default 393216000 if XTENSA_TIMER
-	default 38400000 if INTEL_ADSP_TIMER
-
 config SYS_CLOCK_TICKS_PER_SEC
 	default 12000
 
-config XTENSA_CCOUNT_HZ
-	default 393216000
-
 config INTEL_ADSP_TIMER
 	default y