drivers: spi: fix spi_dw interrupt mask

Found EMSDP board SPI-FLASH sample broke after adding DFSS into spi_dw. Found wrong interrput mask resulting in false interrupt enabled. Now fixed it to fit both DFSS and DW. Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
zephyrproject-rtos · May 30, 2023 · d2e91c6 · d2e91c6
1 parent 5a7b343
commit d2e91c6
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Showing 2 changed files with 6 additions and 11 deletions.
diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c
@@ -436,7 +436,7 @@ static int transceive(const struct device *dev,
 	/* Enable interrupts */
 	reg_data = !rx_bufs ?
 		DW_SPI_IMR_UNMASK & DW_SPI_IMR_MASK_RX :
-		DW_SPI_IMR_UNMASK & DW_SPI_IMR_MASK_TX;
+		DW_SPI_IMR_UNMASK;
 	write_imr(info, reg_data);
 
 	spi_context_cs_control(&spi->ctx, true);

diff --git a/drivers/spi/spi_dw.h b/drivers/spi/spi_dw.h
@@ -258,17 +258,12 @@ static int reg_test_bit(uint8_t bit, uint32_t addr, uint32_t off)
 					 DW_SPI_IMR_TXOIM | \
 					 DW_SPI_IMR_RXUIM | \
 					 DW_SPI_IMR_RXOIM | \
-					 DW_SPI_IMR_RXFIM | \
-					 DW_SPI_IMR_MSTIM)
-#define DW_SPI_IMR_MASK_TX		(~(DW_SPI_IMR_RXUIM | \
-					   DW_SPI_IMR_TXOIM | \
+					 DW_SPI_IMR_RXFIM)
+#define DW_SPI_IMR_MASK_TX		(~(DW_SPI_IMR_TXEIM | \
+					   DW_SPI_IMR_TXOIM))
+#define DW_SPI_IMR_MASK_RX		(~(DW_SPI_IMR_RXUIM | \
 					   DW_SPI_IMR_RXOIM | \
-					   DW_SPI_IMR_MSTIM))
-#define DW_SPI_IMR_MASK_RX		(~(DW_SPI_IMR_TXEIM |\
-					   DW_SPI_IMR_RXUIM | \
-					   DW_SPI_IMR_TXOIM | \
-					   DW_SPI_IMR_RXOIM | \
-					   DW_SPI_IMR_MSTIM))
+					   DW_SPI_IMR_RXFIM))
 
 /*
  * Including the right register definition file