UART NS16550 Underflow Issue During Clearing Port

[lipengit]

Describe the bug
During UART initialization, the CPU reads the RDR register to clear the UART port, the Synopsys UART IP reports a buffer under flow error.

To Reproduce
We have this issue on Synopsys UART IP. Not sure if this issue can be reproduced on other UART IPs that are NS16550 compatible.

Expected behavior
During the UART initialization, when the CPU reads the RDR register to clear the port, the UART should NOT reports a buffer under flow error.

Impact
We have fixed this issue with minor changes to "uart_ns16550.c"
Before clear the port, we just need to set DLAB to 1. After clear the port, we reset DLAB to 0.

Logs and console output
UART_0 Error[Buffer Underflow] RBR doesn't contains the valid data.

Environment (please complete the following information):

• OS: Windows
• Toolchain: Xtensa XCC
• Commit SHA or Version used: v2.5.0, fe7c2ef

Additional context
We have fixed this issue. Please help merge the above patch to the main branch. Thanks.

[galak]

Fix in #34235

[jenmwms]

Can the title be slightly modified to describe the issue? Maybe add 'underflow issue' or 'does not fully clear the port'?