-
Notifications
You must be signed in to change notification settings - Fork 6.8k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
drivers: flash: stm32f4: resets OPTCR register #18296
Changes from all commits
File filter
Filter by extension
Conversations
Jump to
Diff view
Diff view
There are no files selected for viewing
Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -329,6 +329,28 @@ static int stm32_flash_init(struct device *dev) | |
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_HSEM); | ||
#endif /* CONFIG_SOC_SERIES_STM32WBX */ | ||
|
||
#ifdef CONFIG_SOC_SERIES_STM32F4X | ||
/* | ||
* make sure that user options are disabled | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. "make sure that user options are disabled". There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I leave it to the ST guys to maintain the stm32 drivers. I quickly adopted the coding style from the code above. Think maybe a reset function for the flash driver would be useful. This function can be implemented different for each stm32. |
||
* they affecting if flash read/write operations | ||
* are allowed on the flash for spezific sectors | ||
*/ | ||
struct stm32f4x_flash *regs = FLASH_STM32_REGS(dev); | ||
|
||
/* check if we are not in the typical reset config*/ | ||
if (regs->optcr != 0x0FFFFFED) { | ||
/* clear OPTLOCK */ | ||
regs->optkeyr = 0x08192A3B; | ||
regs->optkeyr = 0x4C5D6E7F; | ||
if (regs->optkeyr & 1) { | ||
/* still locked so we failed*/ | ||
return -EIO; | ||
} | ||
/* write reset config register content*/ | ||
regs->optcr = 0x0FFFFFED; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Looking to 2 F4 variants ref man, I've found reset value to 0x0FFFAAED There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. check RM0402 from st, it's the reference manual for the stm32f412 series. On page 77 you will find the value. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. This would work for F412 but not F401 not F446... at least, while this code will be used for all F4 series. |
||
} | ||
#endif | ||
|
||
k_sem_init(&p->sem, 1, 1); | ||
|
||
return flash_stm32_write_protection(dev, false); | ||
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Since we'll need dedicated code for each series, this will soon get unreadable.
For code genericity, please use a function that will be implemented in each series dedicated file.