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ESP32: Add pinmux, GPIO, watchdog, RNG drivers; begin cleaning up ISR tables #724

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merged 9 commits into from
Aug 9, 2017
+1,100 −143
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ESP32: Add pinmux, GPIO, watchdog, RNG drivers; begin cleaning up ISR tables #724

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662377a
pinmux: Allow up to 6 functions
lpereira Jun 27, 2017
a3f1c7b
drivers: pinmux: Add pin multiplexer driver for ESP32
lpereira Jun 27, 2017
520b0c8
drivers: gpio: esp32: Add ESP32 GPIO driver
lpereira Jun 19, 2017
92a852d
drivers: watchdog: Implement ESP32 watchdog driver
lpereira Jun 27, 2017
e1ef7ff
drivers: random: Add ESP32 random number generator driver
lpereira Jun 30, 2017
a8c885e
samples: drivers: gpio: Make the sample work with ESP32
lpereira Jun 30, 2017
7062e7f
arch: xtensa: Remove mentions of dynamic interrupt settings
lpereira Jul 7, 2017
b633da3
arch: xtensa: Convert Xtensa port to use gen_isr_table
lpereira Jul 7, 2017
625b6d6
arch: xtensa: Move exception table to xtensa_intr.c
lpereira Jul 19, 2017
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2 changes: 2 additions & 0 deletions arch/common/Makefile.gen_isr_tables
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Expand Up @@ -4,6 +4,8 @@ OUTPUT_OBJ := isr_tables.o

ifeq ($(ARCH),riscv32)
OUTPUT_FORMAT := elf32-littleriscv
else ifeq ($(ARCH),xtensa)
OUTPUT_FORMAT := elf32-xtensa-le
else
OUTPUT_FORMAT := elf32-little$(ARCH)
endif
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12 changes: 0 additions & 12 deletions arch/xtensa/Kconfig
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Expand Up @@ -47,8 +47,6 @@ config SW_ISR_TABLE
table, unlike ISRs connected directly in the vector table, allow
a parameter to be passed to the interrupt handlers. Also, invoking
the exception/interrupt exit stub is automatically done.
This has to be enabled for dynamically connecting interrupt handlers
at runtime (SW_ISR_TABLE_DYNAMIC).

config IRQ_OFFLOAD
bool "Enable IRQ offload"
Expand All @@ -58,16 +56,6 @@ config IRQ_OFFLOAD
run in interrupt context. Uses one entry in the IDT. Mainly useful
for test cases.

config SW_ISR_TABLE_DYNAMIC
bool
prompt "Allow installing interrupt handlers at runtime"
depends on SW_ISR_TABLE
default n
help
This option enables irq_connect_dynamic(). It moves the ISR table to
SRAM so that it is writable. This has the side-effect of removing
write-protection on the ISR table.

config XTENSA_RESET_VECTOR
bool
prompt "Build reset vector code"
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2 changes: 0 additions & 2 deletions arch/xtensa/core/Makefile
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Expand Up @@ -13,5 +13,3 @@ obj-y = ${obj-atomic} cpu_idle.o fatal.o \
xtensa_intr.o xtensa_vectors.o irq_manage.o
obj-$(CONFIG_XTENSA_USE_CORE_CRT1) += crt1.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
# Keep this last so that vague linking works
obj-y += sw_isr_table.o
59 changes: 0 additions & 59 deletions arch/xtensa/core/sw_isr_table.S
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This file was deleted.

48 changes: 8 additions & 40 deletions arch/xtensa/core/xtensa_intr.c
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Expand Up @@ -14,56 +14,24 @@
#include "xtensa_rtos.h"
#include "xtensa_api.h"
#include <kernel_structs.h>
#include <sw_isr_table.h>

#if XCHAL_HAVE_EXCEPTIONS

/* Handler table is in xtensa_intr_asm.S */

extern xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM];


/*
* Default handler for unhandled exceptions.
*/
void xt_unhandled_exception(XtExcFrame *frame)
static void unhandled_exception_trampoline(XtExcFrame *frame)
{
FatalErrorHandler();
CODE_UNREACHABLE;
}


/*
* This function registers a handler for the specified exception.
* The function returns the address of the previous handler.
* On error, it returns 0.
*/
xt_exc_handler _xt_set_exception_handler(int n, xt_exc_handler f)
{
xt_exc_handler old;

if (n < 0 || n >= XCHAL_EXCCAUSE_NUM)
return 0; /* invalid exception number */

old = _xt_exception_table[n];

if (f) {
_xt_exception_table[n] = f;
} else {
_xt_exception_table[n] = &xt_unhandled_exception;
}

return ((old == &xt_unhandled_exception) ? 0 : old);
}

xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM] __aligned(4) = {
[0 ... (XCHAL_EXCCAUSE_NUM - 1)] = unhandled_exception_trampoline
};
#endif

#if XCHAL_HAVE_INTERRUPTS
/*
* Default handler for unhandled interrupts.
*/
void xt_unhandled_interrupt(void *arg)
#if defined(CONFIG_SW_ISR_TABLE) && defined(XCHAL_HAVE_INTERRUPTS)
void _irq_spurious(void *arg)
{
ReservedInterruptHandler((unsigned int)arg);
CODE_UNREACHABLE;
}
#endif /* XCHAL_HAVE_INTERRUPTS */
#endif
22 changes: 0 additions & 22 deletions arch/xtensa/core/xtensa_intr_asm.S
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Expand Up @@ -39,28 +39,6 @@ _xt_vpri_mask: .word 0xFFFFFFFF /* Virtual priority mask */
#endif /* XCHAL_HAVE_INTERRUPTS */


#if XCHAL_HAVE_EXCEPTIONS

/*
-------------------------------------------------------------------------------
Table of C-callable exception handlers for each exception. Note that not all
slots will be active, because some exceptions (e.g. coprocessor exceptions)
are always handled by the OS and cannot be hooked by user handlers.
-------------------------------------------------------------------------------
*/

.data
.global _xt_exception_table
.align 4

_xt_exception_table:
.rept XCHAL_EXCCAUSE_NUM
.word xt_unhandled_exception /* handler address */
.endr

#endif


/*
-------------------------------------------------------------------------------
unsigned int _xt_ints_on ( unsigned int mask )
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6 changes: 6 additions & 0 deletions arch/xtensa/soc/D_108mini/linker.ld
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Expand Up @@ -49,6 +49,9 @@ MEMORY
srom0_seg : org = 0x50000000, len = 0x300
srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -604,4 +607,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/D_212GP/linker.ld
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Expand Up @@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000378, len = 0x48
sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -610,4 +613,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
7 changes: 7 additions & 0 deletions arch/xtensa/soc/D_233L/linker.ld
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Expand Up @@ -46,6 +46,9 @@ MEMORY
sram20_seg : org = 0x00002500, len = 0x3FFDB00
srom0_seg : org = 0xFE000000, len = 0x300
srom1_seg : org = 0xFE000300, len = 0xFFFD00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3ffdd50, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -511,4 +514,8 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}

#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/XRC_D2PM_5swIrq/linker.ld
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Expand Up @@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000278, len = 0x4
sram18_seg : org = 0x6000027C, len = 0x1C
sram19_seg : org = 0x60000298, len = 0x3FFFD68
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3fffe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -614,4 +617,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/XRC_FUSION_AON_ALL_LM/linker.ld
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Expand Up @@ -34,6 +34,9 @@ MEMORY
srom0_seg : org = 0x50000000, len = 0x300
srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3ffde000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -443,4 +446,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
8 changes: 8 additions & 0 deletions arch/xtensa/soc/esp32/linker.ld
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Expand Up @@ -27,6 +27,7 @@ PROVIDE ( __stack = 0x3ffe3f20 );
PROVIDE ( uart_tx_one_char = 0x40009200 );
PROVIDE ( uart_rx_one_char = 0x400092d0 );
PROVIDE ( uartAttach = 0x40008fd0 );
PROVIDE ( intr_matrix_set = 0x4000681c );

MEMORY
{
Expand All @@ -36,6 +37,9 @@ MEMORY
drom0_0_seg(R): org = 0x3F400010, len = 0x800000
rtc_iram_seg(RWX): org = 0x400C0000, len = 0x2000
rtc_slow_seg(RW): org = 0x50000000, len = 0x1000
#ifdef CONFIG_GEN_ISR_TABLES
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unfortunately, we are gonna need to make corresponding changes in all the linker scripts for the other Xtensa SOC definitions, otherwise I do not think we can remove the old IRQ handling code unless we update the configuration for everything

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Done.

IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -218,4 +222,8 @@ SECTIONS
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
} GROUP_LINK_IN(RAMABLE_REGION)

#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/hifi2_std/linker.ld
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Expand Up @@ -49,6 +49,9 @@ MEMORY
sram17_seg : org = 0x60000378, len = 0x48
sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -614,4 +617,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/hifi3_bd5/linker.ld
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Expand Up @@ -36,6 +36,9 @@ MEMORY
sram7_seg : org = 0x600001D8, len = 0x4
sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -390,4 +393,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/hifi3_bd5_call0/linker.ld
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Expand Up @@ -36,6 +36,9 @@ MEMORY
sram7_seg : org = 0x600001D8, len = 0x4
sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -390,4 +393,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
6 changes: 6 additions & 0 deletions arch/xtensa/soc/hifi4_bd7/linker.ld
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Expand Up @@ -40,6 +40,9 @@ MEMORY
sram11_seg : org = 0x600002B8, len = 0x48
sram12_seg : org = 0x60000300, len = 0x40
sram13_seg : org = 0x60000340, len = 0x3FFCC0
#ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif
}

PHDRS
Expand Down Expand Up @@ -437,4 +440,7 @@ SECTIONS
{
KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
}
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}
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