Pinned Loading

1. Processor-and-Accelerator Processor-and-Accelerator Public

   MIPS Processor, BNN Accelerator, AXI4 interface, Cache Controller and LRU replacement

   Verilog 11

2. Architecture-of-Parallel-Computers Architecture-of-Parallel-Computers Public

   Simulator for Coherence protocol, parallel programming acceleration with OpenMP, MPI, Hybrid

   C 3

3. Wishbone-to-I2C-bus-controller-IP-Verification Wishbone-to-I2C-bus-controller-IP-Verification Public

   ASIC Verification at 2022 Spring. This course only use SystemVerilog, did not use UVM.

   VHDL 17 5

4. High_Level_Synthesis_for_FPGAs High_Level_Synthesis_for_FPGAs Public

   This resource comes from UCSD’s 237C Parallel Programming for FPGAs. Currently, try to finish this tutorial through vitis_hls 2020.

   VHDL 1

5. Microprocessor-Architecture Microprocessor-Architecture Public

   Cache_Simulator, Branch_Prediction and Dynamic_Instruction_Scheduling

   C++ 1

6. Operating-Systems-Principles Operating-Systems-Principles Public

   Implement process scheduling, lock with priority inheritance, demand paging in XINU OS. All projects pass all tests

   C