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Single firmware for both 1Gbit and 2Gbit Rev10 boards #72

Merged
merged 3 commits into from
Jul 9, 2024
Merged

Single firmware for both 1Gbit and 2Gbit Rev10 boards #72

merged 3 commits into from
Jul 9, 2024

Commits on Jul 9, 2024

  1. Remove dead (per Ian) code

    @henrygab
    henrygab committed Jul 9, 2024
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  2. Enable single firmware for both 1Gbit and 2Gbit Rev10 boards 

    #### `CMakeLists.txt`
* Remove newly added 2Gbit firmware type

#### `nand/nand_ftl_diskio.c`
* Allow SPI NAND initialization to populate the dhara parameters dynamically

#### `nand/spi_nand.c`
* `spi_nand_init()` now fills in the `struct dhara_nand`
* static global page buffer is now maximum size for all supported nand chips (64 bytes extra RAM on 1Gbit Rev10) ... renamed buffer to catch and replace all uses and replace any `sizeof(buffer)` style length with a length calculated based on detected NAND chip.
* Track pointer to detected chip in global variable `g_Actual_Nand_Device`
* Function `read_id()` now fills the `nand_identity_t` structure, does not validate the data (now done in `spi_nand_init()`)
* Converted some `#define` symbols into macros
* use `void *` instead of `uint8_t *` when buffer type is variable type/size
* in `spi_nand.c`, rename static `reset()` function as `spi_nand_reset()` to reduce likelihood of clashing with other functions.

#### Other random bits
* Rename `SPI_NAND_PAGES_PER_BLOCK` --> `SPI_NAND_PAGES_PER_ERASE_BLOCK`
* minor formatting tweaks
    @henrygab
    henrygab committed Jul 9, 2024
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  3. Fix obvious typo (missing return).

    @henrygab
    henrygab committed Jul 9, 2024
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    e857e49 View commit details
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