Merge branch 'main' into feat/esp32c3-icm42670-example

.github/workflows/ci.yml

@@ -2,13 +2,14 @@ name: CI
 
 on:
   pull_request:
-    branches:
-      - main
     paths-ignore:
       - "**/README.md"
   push:
+    branches-ignore:
+      - "gh-readonly-queue/**"
     paths-ignore:
       - "**/README.md"
+  merge_group:
   workflow_dispatch:
 
 env:
@@ -177,12 +178,8 @@ jobs:
 
       # Perform a full build initially to verify that the examples not only
       # build, but also link successfully.
-      # We also use this as an opportunity to verify that the examples link
-      # for each supported image format.
       - name: build esp32c3-hal (no features)
         run: cd esp32c3-hal/ && cargo +nightly build --examples
-      - name: build esp32c3-hal (mcu-boot)
-        run: cd esp32c3-hal/ && cargo +nightly build --examples --features=mcu-boot
       # Subsequent steps can just check the examples instead, as we're already
       # confident that they link.
       - name: check esp32c3-hal (common features)
@@ -202,6 +199,8 @@ jobs:
         run: cd esp32c3-hal/ && cargo +nightly check --example=embassy_serial --features=embassy,embassy-time-systick,async
       - name: check esp32c3-hal (async, i2c)
         run: cd esp32c3-hal/ && cargo +nightly check --example=embassy_i2c --features=embassy,embassy-time-systick,async
+      - name: check esp32c3-hal (async, usb_serial_jtag)
+        run: cd esp32c3-hal/ && cargo +nightly check --example=embassy_usb_serial_jtag --features=embassy,embassy-time-systick,async
       - name: check esp32c3-hal (interrupt-preemption)
         run: cd esp32c3-hal/ && cargo +nightly check --example=interrupt_preemption --features=interrupt-preemption
       - name: check esp32c3-hal (direct-vectoring)

CHANGELOG.md

@@ -13,21 +13,30 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - ESP32-C6: LP core clock is configurable (#907)
 - Derive `Clone` and `Copy` for `EspTwaiFrame` (#914)
 - A way to configure inverted pins (#912)
+- Added API to check a GPIO-pin's interrupt status bit (#929)
+- A `embedded_io_async::Read` implementation for `UsbSerialJtag` (#889)
 
 ### Changed
 
 - C2, C3: atomic emulation trap is now opt-in (#904)
 - Improve DMA documentation & clean up module (#915)
+- Only allow a single version of `esp-hal-common` to be present in an application (#934)
+- C3, C6 and H2 can now use the `zero-rtc-bss` feature to enable `esp-hal-common/rv-zero-rtc-bss` (#867)
+- Reuse `ieee802154_clock_enable/disable()` functions for BLE and rename `ble_ieee802154_clock_enable()` (#953)
 
 ### Fixed
 
 - ESP32-C2/C3 examples: fix build error (#899)
 - ESP32-S3: Fix GPIO interrupt handler crashing when using GPIO48. (#898)
 - Fixed short wait times in embassy causing hangs (#906)
 - Make sure to clear LP/RTC RAM before loading code (#916)
+- Async RMT channels can be used concurrently (#925)
+- Xtensa: Allow using `embassy-executor`'s thread-mode executor if neither `embassy-executor-thread`, nor `embassy-executor-interrupt` is enabled. (#937)
 
 ### Removed
 
+- Removed the `mcu-boot` feature from `esp32c3-hal` (#938)
+
 ### Breaking
 - Direct boot support has been removed (#903).
 - `Spi::new`/`Spi::new_half_duplex` takes no gpio pin now, instead you need to call `with_pins` to setup those (#901).

esp-hal-common/Cargo.toml

@@ -11,6 +11,13 @@ description  = "HAL implementations for peripherals common among Espressif devic
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 
+# Prevent multiple copies of this crate in the same binary.
+# Needed because different copies might get different features, causing
+# confusing build errors due to expected features not getting enabled
+# on the unintentional copy.
+# This is especially common when mixing crates from crates.io and git.
+links = "esp-hal-common"
+
 [dependencies]
 bitflags             = "2.4.1"
 bitfield             = "0.14.0"

esp-hal-common/build.rs

@@ -26,10 +26,15 @@ macro_rules! assert_unique_features {
 
 // Given some features, assert that AT LEAST one of the features is enabled.
 macro_rules! assert_used_features {
-    ( $($all:tt),* ) => {
+    ( $all:tt ) => {
+        #[cfg(not(feature = $all))]
+        compile_error!(concat!("The feature flag must be provided: ", $all));
+    };
+
+    ( $($all:tt),+ ) => {
         #[cfg(not(any($(feature = $all),*)))]
         compile_error!(concat!("One of the feature flags must be provided: ", $($all, ", "),*));
-    }
+    };
 }
 
 // Given some features, assert that EXACTLY one of the features is enabled.
@@ -113,6 +118,10 @@ fn main() -> Result<(), Box<dyn Error>> {
     // is available:
     #[cfg(feature = "embassy")]
     {
+        #[cfg(feature = "esp32")]
+        assert_unique_used_features!("embassy-time-timg0");
+
+        #[cfg(not(feature = "esp32"))]
         assert_unique_used_features!("embassy-time-systick", "embassy-time-timg0");
     }
 

esp-hal-common/src/embassy/executor/xtensa/mod.rs

@@ -12,6 +12,10 @@ pub mod thread;
 #[cfg(feature = "embassy-executor-thread")]
 pub use thread::*;
 
+#[cfg(any(
+    feature = "embassy-executor-thread",
+    feature = "embassy-executor-interrupt",
+))]
 #[export_name = "__pender"]
 fn __pender(context: *mut ()) {
     let context = (context as usize).to_le_bytes();

esp-hal-common/src/gpio.rs

@@ -186,12 +186,15 @@ pub trait Pin {
 
     fn set_alternate_function(&mut self, alternate: AlternateFunction);
 
+    /// Listen for interrupts
     fn listen(&mut self, event: Event) {
         self.listen_with_options(event, true, false, false)
     }
 
+    /// Checks if listening for interrupts is enabled for this Pin
     fn is_listening(&self) -> bool;
 
+    /// Listen for interrupts
     fn listen_with_options(
         &mut self,
         event: Event,
@@ -200,8 +203,13 @@ pub trait Pin {
         wake_up_from_light_sleep: bool,
     );
 
+    /// Stop listening for interrupts
     fn unlisten(&mut self);
 
+    /// Checks if the interrupt status bit for this Pin is set
+    fn is_interrupt_set(&self) -> bool;
+
+    /// Clear the interrupt status bit for this Pin
     fn clear_interrupt(&mut self);
 }
 
@@ -354,6 +362,8 @@ pub trait BankGpioRegisterAccess {
 
     fn read_output() -> u32;
 
+    fn read_interrupt_status() -> u32;
+
     fn write_interrupt_status_clear(word: u32);
 
     fn write_output_set(word: u32);
@@ -382,6 +392,10 @@ impl BankGpioRegisterAccess for Bank0GpioRegisterAccess {
         unsafe { &*GPIO::PTR }.out.read().bits()
     }
 
+    fn read_interrupt_status() -> u32 {
+        unsafe { &*GPIO::PTR }.status.read().bits()
+    }
+
     fn write_interrupt_status_clear(word: u32) {
         unsafe { &*GPIO::PTR }
             .status_w1tc
@@ -423,6 +437,10 @@ impl BankGpioRegisterAccess for Bank1GpioRegisterAccess {
         unsafe { &*GPIO::PTR }.out1.read().bits()
     }
 
+    fn read_interrupt_status() -> u32 {
+        unsafe { &*GPIO::PTR }.status1.read().bits()
+    }
+
     fn write_interrupt_status_clear(word: u32) {
         unsafe { &*GPIO::PTR }
             .status1_w1tc
@@ -801,6 +819,10 @@ where
         }
     }
 
+    fn is_interrupt_set(&self) -> bool {
+        <Self as GpioProperties>::Bank::read_interrupt_status() & 1 << (GPIONUM % 32) != 0
+    }
+
     fn clear_interrupt(&mut self) {
         <Self as GpioProperties>::Bank::write_interrupt_status_clear(1 << (GPIONUM % 32));
     }

esp-hal-common/src/interrupt/riscv.rs

@@ -535,7 +535,7 @@ unsafe fn handle_exception(_pc: usize, trap_frame: *mut TrapFrame) {
             (*trap_frame).t4 = frame[29];
             (*trap_frame).t5 = frame[30];
             (*trap_frame).t6 = frame[31];
-            (*trap_frame).pc = pc + 4;
+            (*trap_frame).pc = _pc + 4;
 
             return;
         }

esp-hal-common/src/rmt.rs

@@ -1123,9 +1123,6 @@ pub mod asynch {
                 _ => unreachable!(),
             }
 
-            let rmt = unsafe { &*crate::peripherals::RMT::PTR };
-            rmt.int_ena.write(|w| unsafe { w.bits(0) });
-
             WAKER[channel].wake();
         }
     }
@@ -1255,9 +1252,6 @@ pub mod asynch {
                 _ => unreachable!(),
             }
 
-            let rmt = unsafe { &*crate::peripherals::RMT::PTR };
-            rmt.int_ena.write(|w| unsafe { w.bits(0) });
-
             WAKER[channel].wake();
         }
     }

esp-hal-common/src/soc/esp32h2/radio_clocks.rs

@@ -17,16 +17,14 @@ impl RadioClockController for RadioClockControl {
     fn enable(&mut self, peripheral: RadioPeripherals) {
         match peripheral {
             RadioPeripherals::Phy => enable_phy(),
-            RadioPeripherals::Bt => todo!("BLE not yet supported"),
-            RadioPeripherals::Ieee802154 => ieee802154_clock_enable(),
+            RadioPeripherals::Bt | RadioPeripherals::Ieee802154 => ble_ieee802154_clock_enable(),
         }
     }
 
     fn disable(&mut self, peripheral: RadioPeripherals) {
         match peripheral {
             RadioPeripherals::Phy => disable_phy(),
-            RadioPeripherals::Bt => todo!("BLE not yet supported"),
-            RadioPeripherals::Ieee802154 => ieee802154_clock_disable(),
+            RadioPeripherals::Bt | RadioPeripherals::Ieee802154 => ble_ieee802154_clock_disable(),
         }
     }
 
@@ -59,7 +57,7 @@ fn disable_phy() {
         .modify(|_, w| w.clk_i2c_mst_en().clear_bit());
 }
 
-fn ieee802154_clock_enable() {
+fn ble_ieee802154_clock_enable() {
     let modem_lpcon = unsafe { &*esp32h2::MODEM_LPCON::PTR };
     let modem_syscon = unsafe { &*esp32h2::MODEM_SYSCON::PTR };
 
@@ -89,7 +87,7 @@ fn ieee802154_clock_enable() {
         .modify(|_, w| w.clk_coex_en().set_bit());
 }
 
-fn ieee802154_clock_disable() {
+fn ble_ieee802154_clock_disable() {
     let modem_lpcon = unsafe { &*esp32h2::MODEM_LPCON::PTR };
     let modem_syscon = unsafe { &*esp32h2::MODEM_SYSCON::PTR };