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core: pager can use memory between SRAM start and core load address #1826

Merged
merged 1 commit into from
Nov 15, 2017
Merged

core: pager can use memory between SRAM start and core load address #1826

merged 1 commit into from
Nov 15, 2017

Commits on Nov 15, 2017

  1. core: pager can use memory between SRAM start and core load address 

    If core is loaded some 4kB pages above the start of the physical
internal ram, some 4kB memory block will not be used by the pager.

This situation can occur if the beginning of the internal ram is
used by a bootloader. Bootloader must load op-tee above its own
used memory. Such bootloader memory is freely available to op-tee
core (pager).

This change adds the physical memory between TEE RAM base address
and the op-tee entry point address to the pager page pool. This
change also default maps this area so that pager identifies physical
pages as valid page addresses.

This changes fixes the plat-vexpress against CFG_TEE_RAM_START being
different from CFG_TEE_LOAD_ADDR.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
    @etienne-lms
    etienne-lms committed Nov 15, 2017
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