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Add THREAD_FLAGS_EXIT_ON_IRQ for preempted threads #9

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Jun 27, 2014

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Adds a THREAD_FLAGS_EXIT_ON_IRQ flag to the saved state of a thread
to make it possible to check that no other thread may resume if there's
a thread preempted by an IRQ.

Adds a THREAD_FLAGS_EXIT_ON_IRQ flag to the saved state of a thread
to make it possible to check that no other thread may resume if there's
a thread preempted by an IRQ.
@pascal-brand38
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+1
Tests are fine

@ghost ghost merged commit 63aac0e into OP-TEE:master Jun 27, 2014
@jenswi-linaro jenswi-linaro deleted the irq_fix_140626 branch June 27, 2014 11:29
etienne-lms referenced this pull request in etienne-lms/optee_os Mar 14, 2017
Bits #9..#0 of CPU NSACR registers are specified by ARM as SBZP ("Set
Bit to Zero or Preserved on write"). This change fixes plat-zynq7k to
conform with the specs.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
etienne-lms referenced this pull request in etienne-lms/optee_os Mar 14, 2017
Bits #9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
ldts pushed a commit to BayLibre/optee_os that referenced this pull request Aug 30, 2018
Bits OP-TEE#9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
vingu-linaro pushed a commit to vingu-linaro/optee_os that referenced this pull request May 20, 2020
A squashed series of changes in stm32mp1 clock driver for
supporting SCMI server as a clock consumer. These changes
have not been upstream yet in OP-TEE OS. Below the details.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

### Commit message OP-TEE#1
plat-stm32mp1: clock: remove oscillators and PLLs from shared resources

Oscillators, PLL1 and PLL2 are not resources allocated upon platform
configuration, these are always under secure world control. This change
removes them fro the list of the shared resources.

Since these resource are always secure, there is no need to look up
clock tree when a leaf clock is registered as secure to know which
parent clock(s) is/are secure. This removes functions from
shared_resources.c and stm32mp1_clk.c.

stm32mp_register_clock_parents_secure() can be removed and all its
private dependencies.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#2
plat-stm32mp1: clock: fix mcu/axi parent clock

Correct MCU clock parent selector: MCU subsystem clock is derived
from clock  PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock  PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#3
plat-stm32mp1: clock: allow tree lookup for several system clocks

Oscillators, PLLs and some system clocks can be related straight to
a parent clock. Prior this change were only oscillators and few
clocks supported by this look up. This changes adds PLLs and other
system clocks. This enables for flexible use of clock tree exploration
when computing a clock frequency value.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#4
plat-stm32mp1: clock: handle always on clocks

Oscillators and PLLs are not gated on stm32mp_clk_enable/disable()
calls. This change allows function to blindly call clock gating function
on always on clocks. Gating these clock is out of the scope of this
change even if preferred for power consumption optimization.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#5
plat-stm32mp1: clock: add rtc as gateable clock

Add clock RTC as a clock one can access through the
stm32_util.h API function stm32_clock_*().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#6
plat-stm32mp1: clock: enable some secure clocks at init

With this change some system clock are enabled by core at
boot time and have a reference counter synchronized with
the clock hardware state.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#7
plat-stm32mp1: factorize rtc clock gating bit position

For consistency, define macro RCC_BDCR_RTCCKEN_POS in stm32mp1_rcc.h
to factorize definition of the RTC clock gating resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#8
plat-stm32mp1: add mdma secure clock

Add support for MDMA secure clock.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#9
plat-stm32mp1: remove unused usb non-secure clock

Remove unused clocks USBO_CLK and USBPHY_K resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#10
plat-stm32mp1: clock: secure and non-secure gateable clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to ensure that parents of a secure clock
are registered a secure resources in the shared_resources.c driver.

Non-secure clock that OP-TEE expect to enable are enabled without
increase the clock refcount. For consistency, such clocks are not
disabled by core. Such clocks may be accessed by OP-TEE Core when
the non-secure world is not executing, for example at boot time
or could be when system is suspending/resuming.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#11
plat-stm32mp1: clock: fixup parent clock ids

Use _UNKNOWN_ID macro rather than 0xff for clocks parent IDs
that do not relate to a gateable clock.

Fix parent clock ID _HSE_KER_DIV2 that relates to clock
CK_HSE_KER_DIV2, not CK_HSE.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#12
plat-stm32mp1: clock: don't embed unused non-secure uart clock

Embed UART parent clock resource upon CFG_WITH_NSEC_UARTS=y.
This configuration switch was already used to embed or not
the non-secure UART clocks but not the resources used to
looks there ascendant clocks.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#13
plat-stm32mp1: shared resources: get shared clock controller state

stm32mp_nsec_can_access_clock() reports whether a clock is assigned
to the secure world only, or when it can be manipulated by the
non-secure world.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

### Commit message OP-TEE#14
plat-stm32mp1: shared resource: remove unused stm32mp_clock_is_*()

Remove unused functions stm32mp_clock_is_shareable(),
stm32mp_clock_is_shared() and stm32mp_clock_is_non_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
tbourgoi pushed a commit to STMicroelectronics/optee_os that referenced this pull request Jun 19, 2024
In commit message, there could be a Change-Id information
if Gerrit is used. In some case, the Change-Id number can
be similar to a word and produce codespell warnings.
For example
  WARNING: 'daa' may be misspelled - perhaps 'data'?
  OP-TEE#9:
  Change-Id: I20dc18f57e4daa3168d481d4de08c138dc2eaa80
So discard such line

Change-Id: I046d30b3953616cd0b456afccbbbad0b328ee357
Signed-off-by: Lionel VITTE <lionel.vitte@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/368305
Reviewed-by: Thomas BOURGOIN <thomas.bourgoin@foss.st.com>
Domain-Review: Thomas BOURGOIN <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
This pull request was closed.
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