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Add optimization_level=0 to transpiler for compiling dynamic circuits #2000

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Nov 20, 2023
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Add optimization_level=0 to transpiler for compiling dynamic circuits #2000

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4 changes: 3 additions & 1 deletion qiskit_aer/backends/aer_compiler.py
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Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,9 @@ def compile(self, circuits, basis_gates=None, optypes=None):
circuit = self._inline_initialize(circuit, compiled_optypes[idx])
if self._is_dynamic(circuit, compiled_optypes[idx]):
compiled_circ = transpile(
self._inline_circuit(circuit, None, None), basis_gates=basis_gates
self._inline_circuit(circuit, None, None),
basis_gates=basis_gates,
optimization_level=0,
)
compiled_circuits.append(compiled_circ)
# Recompute optype for compiled circuit
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7 changes: 7 additions & 0 deletions releasenotes/notes/fix_transpiler_lvl_for_dynamic_circuit-4ead3b497bbcc632.yaml
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Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
---
fixes:
- |
For dynamic circuits, aer_compiler calls transpiler without optimizaiton
level. Because id gates are removed by transpiler, noise applied id gates
did not work correctly. This fix adds optimization_level=0 not to remove
id gates of dynamic circuits
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