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esp32c3: ziscr extention missing #19421
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I think @gschorcht is currently fixing it with #19450 |
Exactly, PR #19450 provides the changes to be able to compile RIOT for ESP32-C3 with the Espressif GCC v12.2 toolchain. Espressif provides its own RISC-V toolchain and the current master does not support GCC v12.2 but only GCC v8.4 as documented. Using |
19411: cpu/gd32v: add riotboot support r=benpicco a=gschorcht ### Contribution description This PR provides `riotboot` support for GD32V. ### Testing procedure Use any GD32V board with a JTAG adapter and flash the bootloader: ```python PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C bootloaders/riotboot flash ``` Flash slot 0 and set `RIOT_VERSION` to 1 ```python USEMODULE=stdio_uart FEATURES_REQUIRED=riotboot RIOT_VERSION=1 \ PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C tests/shell riotboot/flash-slot0 ... ### Flashing Target ### Binfile detected, adding ROM base address: 0x08000000 Flashing with IMAGE_OFFSET: 0x08001000 ``` ```python > main(): This is RIOT! (Version: 1) test_shell. ``` Flash slot 1 and set `RIOT_VERSION` to 2 ```python USEMODULE=stdio_uart FEATURES_REQUIRED=riotboot RIOT_VERSION=2 \ PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C tests/shell riotboot/flash-slot1 ... ### Flashing Target ### Binfile detected, adding ROM base address: 0x08000000 Flashing with IMAGE_OFFSET: 0x08010800 ``` ```python > main(): This is RIOT! (Version: 2) test_shell. ``` ### Issues/PRs references 19436: cpp11-compat: thread::sleep_for in microseconds r=benpicco a=kfessel ### Contribution description after reviewing #19369 i found that there is a conversion to nanoseconds just to convert it to microseconds some instrunctions later for ztimer64_usec to handle it this removes one of the conversions (convert once direct to microseconds) ### Testing procedure run the cpp tests ### Issues/PRs references #19369 19450: cpu/esp32: fix compilation issues with GCC 12.2 r=benpicco a=gschorcht ### Contribution description This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2. It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1. **Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor. ### Testing procedure Green CI The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi` and `esp_ble` for all supported ESP platforms. ### Issues/PRs references Prerequisite for RIOT-OS/riotdocker#227 Fixes issue #19421 19476: native/syscalls: rename real_clock_gettime to clock_gettime r=benpicco a=Teufelchen1 ### Contribution description When compiling RIOT for native using a recent LLVM and enabling ASAN, one might encounter "Duplicated symbol". This is due to a name clash with `real_clock_gettime()` in compiler-rt from [LLVM](llvm/llvm-project@f50246d), I renamed RIOTs `real_clock_gettime` and just default to the posix function `clock_gettime`. The wrapper existed, most likely, for consistency only. (The best solution would probably to convince the LLVM folks to declare their symbol as `static` and refactor a bit) ### Testing procedure Passing CI should be enough. Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Karl Fessel <karl.fessel@ovgu.de> Co-authored-by: Teufelchen1 <bennet.blischke@haw-hamburg.de>
19450: cpu/esp32: fix compilation issues with GCC 12.2 r=benpicco a=gschorcht ### Contribution description This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2. It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1. **Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor. ### Testing procedure Green CI The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi` and `esp_ble` for all supported ESP platforms. ### Issues/PRs references Prerequisite for RIOT-OS/riotdocker#227 Fixes issue #19421 19476: native/syscalls: rename real_clock_gettime to clock_gettime r=benpicco a=Teufelchen1 ### Contribution description When compiling RIOT for native using a recent LLVM and enabling ASAN, one might encounter "Duplicated symbol". This is due to a name clash with `real_clock_gettime()` in compiler-rt from [LLVM](llvm/llvm-project@f50246d), I renamed RIOTs `real_clock_gettime` and just default to the posix function `clock_gettime`. The wrapper existed, most likely, for consistency only. (The best solution would probably to convince the LLVM folks to declare their symbol as `static` and refactor a bit) ### Testing procedure Passing CI should be enough. Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Teufelchen1 <bennet.blischke@haw-hamburg.de>
19561: cpu/esp32: fix compilation issues with GCC 12.2 [backport 2023.04] r=MrKevinWeiss a=kaspar030 # Backport of #19450 ### Contribution description This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2. It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1. **Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor. ### Testing procedure Green CI The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi` and `esp_ble` for all supported ESP platforms. ### Issues/PRs references Prerequisite for RIOT-OS/riotdocker#227 Fixes issue #19421 Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19561: cpu/esp32: fix compilation issues with GCC 12.2 [backport 2023.04] r=maribu a=kaspar030 # Backport of #19450 ### Contribution description This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2. It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1. **Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor. ### Testing procedure Green CI The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi` and `esp_ble` for all supported ESP platforms. ### Issues/PRs references Prerequisite for RIOT-OS/riotdocker#227 Fixes issue #19421 19563: treewide: fix typos and false positives found by codespell [backport 2023.04] r=maribu a=MrKevinWeiss # Backport of #19528 ### Contribution description This fixes some typos and adds one correctly used abbreviation to the ignore list. Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
@Teufelchen1: Can you confirm that #19450 solved the issue? |
Thanks for the reminder. Seems to work now! Great job! |
Description
When trying to use my brand new esp32c3, I ran into an issue compiling for it.
/pkg/esp32_sdk/components/hal/esp32c3/include/hal/interrupt_controller_ll.h:36: Error: unrecognized opcode `csrrc s0,mstatus,8', extension `zicsr' required
Others as well. All related to missing isa extensions.
Steps to reproduce the issue
BOARD=esp32c3-devkit make flash
Expected results
Plug & Play, Build & Flash
This might be related to #17951
Given that PR, I replaced all occurrences of
-march=rv32imc
with-march=rv32imac_zicsr
. That worked, I can compile, flash and see the hello world on my tty.Additionally, I had to disable certain compiler warnings:
I also noticed this little message from the booting device:
Not sure if relevant, as I'm new to esp32c3.
Click me: all rv32imc -> rv32imac_zicsr replacements
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