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esp32c3: ziscr extention missing #19421

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Teufelchen1 opened this issue Mar 24, 2023 · 4 comments
Closed

esp32c3: ziscr extention missing #19421

Teufelchen1 opened this issue Mar 24, 2023 · 4 comments

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@Teufelchen1
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Description

When trying to use my brand new esp32c3, I ran into an issue compiling for it.

/pkg/esp32_sdk/components/hal/esp32c3/include/hal/interrupt_controller_ll.h:36: Error: unrecognized opcode `csrrc s0,mstatus,8', extension `zicsr' required
Others as well. All related to missing isa extensions.

Steps to reproduce the issue

  • use 22.04.1-Ubuntu
  • go to examples/hello-world (maybe add the esp-sdk pkg)
  • run BOARD=esp32c3-devkit make flash
  • Observe compilation errors

Expected results

Plug & Play, Build & Flash

This might be related to #17951
Given that PR, I replaced all occurrences of -march=rv32imc with -march=rv32imac_zicsr. That worked, I can compile, flash and see the hello world on my tty.

Additionally, I had to disable certain compiler warnings:

CFLAGS += -Wno-enum-conversion
CFLAGS += -Wno-attributes
CFLAGS += -Wno-maybe-uninitialized

I also noticed this little message from the booting device:

# Calculated: 363da575129f253d18d4fc05a75bcfffe9a08e52786188f5f5d06a74cfd5bad5
# Expected: cb0f9786add2bad1adce930935dcb7a3ff28232451b0d3cd6255a9101fff41fa
# Attempting to boot anyway...

Not sure if relevant, as I'm new to esp32c3.

Click me: all rv32imc -> rv32imac_zicsr replacements
 diff --git a/makefiles/arch/riscv.inc.mk b/makefiles/arch/riscv.inc.mk
index 3544b214b1..ed78a2bc05 100644
--- a/makefiles/arch/riscv.inc.mk
+++ b/makefiles/arch/riscv.inc.mk
@@ -44,12 +44,13 @@ ifeq (,$(TARGET_ARCH))
 endif
 
 ifeq ($(TOOLCHAIN),gnu)
-  GCC_DEFAULTS_TO_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 -misa-spec=2.2 -E - > /dev/null 2>&1 && echo 1 || echo 0)
+  GCC_DEFAULTS_TO_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | $(TARGET_ARCH)-gcc -march=rv32imac_zicsr -mabi=ilp32 -misa-spec=2.2 -E - > /dev/null 2>&1 && echo 1 || echo 0)
 endif
 
+
 GCC_DEFAULTS_TO_NEW_RISCV_ISA ?= 0
 
-CFLAGS_CPU := -march=rv32imac -mabi=ilp32
+CFLAGS_CPU := -march=rv32imac_zicsr -mabi=ilp32
diff --git a/cpu/esp32/esp-idf/esp_idf_cflags.mk b/cpu/esp32/esp-idf/esp_idf_cflags.mk
index 3e7ac6b896..aafe2ea2da 100644
--- a/cpu/esp32/esp-idf/esp_idf_cflags.mk
+++ b/cpu/esp32/esp-idf/esp_idf_cflags.mk
@@ -35,7 +35,7 @@ CFLAGS += -Wno-cast-align
 ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include
   CFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV
-  CFLAGS += -march=rv32imc
+  CFLAGS += -march=rv32imac_zicsr
   CFLAGS += -Wno-error=format=
   CFLAGS += -nostartfiles
   CFLAGS += -Wno-format
diff --git a/cpu/esp32/bootloader/Makefile b/cpu/esp32/bootloader/Makefile
index dfb4a5df06..b56655cbfe 100644
--- a/cpu/esp32/bootloader/Makefile
+++ b/cpu/esp32/bootloader/Makefile
@@ -167,7 +167,7 @@ CFLAGS = -include '$(RIOTBUILD_CONFIG_HEADER_C)' \
 ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
   INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include
   CFLAGS += -DCONFIG_IDF_TARGET_ARCH_RISCV
-  CFLAGS += -march=rv32imc
+  CFLAGS += -march=rv32imac_zicsr
   CFLAGS += -Wno-error=format=
   CFLAGS += -nostartfiles
   CFLAGS += -Wno-format
diff --git a/cpu/esp32/Makefile.include b/cpu/esp32/Makefile.include
index 956a132e2f..4167204fb0 100644
--- a/cpu/esp32/Makefile.include
+++ b/cpu/esp32/Makefile.include
@@ -206,7 +206,7 @@ CFLAGS += -D_CONST=const
 
 # TODO no relaxation yet
 ifneq (,$(filter riscv%,$(TARGET_ARCH)))
-  CFLAGS += -mno-relax -march=rv32imc -mabi=ilp32 -DRISCV_NO_RELAX
+  CFLAGS += -mno-relax -march=rv32imac_zicsr -mabi=ilp32 -DRISCV_NO_RELAX
 endif
 
 ifneq (,$(filter xtensa%,$(TARGET_ARCH)))
@dylad
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dylad commented Apr 7, 2023

I think @gschorcht is currently fixing it with #19450
You could give it a try and tell us if it's fix your issue.

@gschorcht
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Exactly, PR #19450 provides the changes to be able to compile RIOT for ESP32-C3 with the Espressif GCC v12.2 toolchain.

Espressif provides its own RISC-V toolchain and the current master does not support GCC v12.2 but only GCC v8.4 as documented. Using ${RIOTBASE}/dist/tools/esptools/install.sh esp32c3 installs the toolchain version that is supported and in the PATH variable with . ${RIOTBASE}/dist/tools/esptools/export.sh esp32c3.

bors bot added a commit that referenced this issue Apr 17, 2023
19411: cpu/gd32v: add riotboot support r=benpicco a=gschorcht

### Contribution description

This PR provides `riotboot` support for GD32V.

### Testing procedure

Use any GD32V board with a JTAG adapter and flash the bootloader:
```python
PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C bootloaders/riotboot flash
```
Flash slot 0 and set `RIOT_VERSION` to 1
```python
USEMODULE=stdio_uart FEATURES_REQUIRED=riotboot RIOT_VERSION=1 \
PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C tests/shell riotboot/flash-slot0
...
### Flashing Target ###
Binfile detected, adding ROM base address: 0x08000000
Flashing with IMAGE_OFFSET: 0x08001000
```
```python
> main(): This is RIOT! (Version: 1)
test_shell.
```
Flash slot 1 and set `RIOT_VERSION` to 2
```python
USEMODULE=stdio_uart FEATURES_REQUIRED=riotboot RIOT_VERSION=2 \
PROGRAMMER=openocd BOARD=sipeed-longan-nano make -C tests/shell riotboot/flash-slot1
...
### Flashing Target ###
Binfile detected, adding ROM base address: 0x08000000
Flashing with IMAGE_OFFSET: 0x08010800
```
```python
> main(): This is RIOT! (Version: 2)
test_shell.
```

### Issues/PRs references


19436: cpp11-compat: thread::sleep_for in microseconds r=benpicco a=kfessel

### Contribution description

after reviewing #19369  i found that there is a conversion to nanoseconds just to convert it to microseconds some instrunctions later for ztimer64_usec to handle it this removes one of the conversions (convert once direct to microseconds)

### Testing procedure

run the cpp tests

### Issues/PRs references

#19369

19450: cpu/esp32: fix compilation issues with GCC 12.2 r=benpicco a=gschorcht

### Contribution description

This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2.  It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1.

**Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor.

### Testing procedure

Green CI

The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi`  and `esp_ble` for all supported ESP platforms.

### Issues/PRs references

Prerequisite for RIOT-OS/riotdocker#227
Fixes issue #19421

19476: native/syscalls: rename real_clock_gettime to clock_gettime r=benpicco a=Teufelchen1

### Contribution description

When compiling RIOT for native using a recent LLVM and enabling ASAN, one might encounter "Duplicated symbol".

This is due to a name clash with `real_clock_gettime()` in compiler-rt from [LLVM](llvm/llvm-project@f50246d), I renamed RIOTs `real_clock_gettime` and just default to the posix function `clock_gettime`. The wrapper existed, most likely, for consistency only.

(The best solution would probably to convince the LLVM folks to declare their symbol as `static` and refactor a bit)

### Testing procedure

Passing CI should be enough.


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Karl Fessel <karl.fessel@ovgu.de>
Co-authored-by: Teufelchen1 <bennet.blischke@haw-hamburg.de>
bors bot added a commit that referenced this issue Apr 17, 2023
19450: cpu/esp32: fix compilation issues with GCC 12.2 r=benpicco a=gschorcht

### Contribution description

This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2.  It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1.

**Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor.

### Testing procedure

Green CI

The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi`  and `esp_ble` for all supported ESP platforms.

### Issues/PRs references

Prerequisite for RIOT-OS/riotdocker#227
Fixes issue #19421

19476: native/syscalls: rename real_clock_gettime to clock_gettime r=benpicco a=Teufelchen1

### Contribution description

When compiling RIOT for native using a recent LLVM and enabling ASAN, one might encounter "Duplicated symbol".

This is due to a name clash with `real_clock_gettime()` in compiler-rt from [LLVM](llvm/llvm-project@f50246d), I renamed RIOTs `real_clock_gettime` and just default to the posix function `clock_gettime`. The wrapper existed, most likely, for consistency only.

(The best solution would probably to convince the LLVM folks to declare their symbol as `static` and refactor a bit)

### Testing procedure

Passing CI should be enough.


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Teufelchen1 <bennet.blischke@haw-hamburg.de>
bors bot added a commit that referenced this issue May 9, 2023
19561: cpu/esp32: fix compilation issues with GCC 12.2 [backport 2023.04] r=MrKevinWeiss a=kaspar030

# Backport of #19450

### Contribution description

This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2.  It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1.

**Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor.

### Testing procedure

Green CI

The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi`  and `esp_ble` for all supported ESP platforms.

### Issues/PRs references

Prerequisite for RIOT-OS/riotdocker#227
Fixes issue #19421

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
bors bot added a commit that referenced this issue May 10, 2023
19561: cpu/esp32: fix compilation issues with GCC 12.2 [backport 2023.04] r=maribu a=kaspar030

# Backport of #19450

### Contribution description

This PR provides the changes in `cpu/esp32` and `cpu/esp_common` to fix the compilation issues with GCC v12.2.  It is required as the first step in the preparation of the upgrade to ESP-IDF version 5.1.

**Please note**: Insead of fixing the ESP-IDF 4.4 code itself by a big bunch of patches to fix the compilation problems with GCC v12.2, it temporarily disables some warnings. The reason is that the ESP-IDF 5.1 requires GCC v12.2 and should be fixed for this compiler version by the vendor.

### Testing procedure

Green CI

The change were already tested with all ESP-specific modules like `esp_now`, `esp_wifi`, `esp_spi`  and `esp_ble` for all supported ESP platforms.

### Issues/PRs references

Prerequisite for RIOT-OS/riotdocker#227
Fixes issue #19421

19563: treewide: fix typos and false positives found by codespell [backport 2023.04] r=maribu a=MrKevinWeiss

# Backport of #19528

### Contribution description

This fixes some typos and adds one correctly used abbreviation to the ignore list.



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
@maribu
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maribu commented May 10, 2023

@Teufelchen1: Can you confirm that #19450 solved the issue?

@Teufelchen1
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Thanks for the reminder. Seems to work now! Great job!

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