Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

samd21:setup all clock generators in clock.c #7315

Closed
wants to merge 1 commit into from

Conversation

photonthunder
Copy link

Goal is to have all clock generators setup in clock.c and then turned on/off in periph_conf.c. Does contain some cleanup as well.

@@ -272,6 +277,12 @@ static const spi_conf_t spi_config[] = {
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */

#if RTT_NUMOF || RTC_NUMOF
#ifndef XOSC32_RUNSTBY
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

seems like a D is missing

Copy link
Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Nice catch

#define GEN2_ULP32K (1)
#else
#define CLOCK_CORECLOCK (48000000UL)
#elif CLOCK_USE_8MHZ_DEFAULT
/* edit this value to your needs */
#define CLOCK_DIV (1U)
/* generate the actual core clock frequency */
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
#endif
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Does it make sense to add an error case here?

Copy link
Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Added, I wish there was a better way to set this up to make it cleaner...

@dylad
Copy link
Member

dylad commented Jul 4, 2017

I'll try to take a deeper look soon but what I can already said : there are some broken boards with the current changes

  • sodaq autonomo
  • arduino zero
  • arduino mkr1000

@photonthunder
Copy link
Author

@dylad we could move the #ifndef statements from cpu.c to a more global header, but I didn't know which would be appropriate. We can of course tweak the appropriate periph_conf.h files. @kaspar030 thanks. I am interested in feedback on a better method for handling the clocks in periph_conf.h, something easier to read and tweak?

@biboc
Copy link
Member

biboc commented Jul 10, 2017

That's a good idea to move everything in clock.c
Do it for SAML21 as well, it is very similar.
Should you move clock.c in sam0_common folder?

@photonthunder
Copy link
Author

@biboc, @dylad had made the same request. I was thinking we would get this approved and then expand to the SAML21, but we can expand it now to help get it moving. Mostly waiting for feedback on where to put the #ifndef so that you don't have to include all the options in every periph_conf.h.

@aabadie aabadie modified the milestone: Release 2017.10 Jul 12, 2017
@photonthunder
Copy link
Author

Any feedback on these generic clock generators? Need to clean this up since both RTT and the internal 32 kHz oscillator try to use generator 2 you can end up with a very difficult bug to find. Almost need a periph_clock.h to go along with periph_conf.h. You put the default settings (#ifndef) in periph_clock.h and place that after periph_conf.h in the appropriate files. I will experiment but would greatly appreciate some ideas.

@photonthunder
Copy link
Author

@biboc, @dylad I was just looking at the saml21 board and I don't see any code referring to the different generic clock generators? Don't even setup the external oscillator for rtt.c? So I think I will try and get this working for the samd21 only for now.

@photonthunder
Copy link
Author

@kaspar030 I moved the ifndef to an include file (periph_clock_config.h) and added it to the appropriate samd21 files. All boards now compile. Rebased and Squashed as well.

@photonthunder photonthunder force-pushed the samd21_clock branch 3 times, most recently from aa5b980 to 11774e6 Compare August 16, 2017 21:26
@dylad
Copy link
Member

dylad commented Aug 17, 2017

So I think I will try and get this working for the samd21 only for now

Ok, once your PR will be merged, I'll expand your work to SAML21 family.

Copy link
Contributor

@haukepetersen haukepetersen left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Nice one, I like the direction!

Looking at the clock configuration code, I am wondering if we can't be more 'user friendly' here. In the end, we want to define only the values we absolutely have to. So thinking out loud: could we cut the config down to something like this:

/* select the main clock source:
 *  0: PLL fed by internal 8MHz oscillator
 *  1: PLL fed by external 32.768kHz oscillator
 *  2: internal 8MHz oscillator
 */
#define CLOCK_SRC      (0)
/* define core clock frequency [in Hz] */
#define CLOCK_CORECLOCK   (48000000U)
/* is an external 32.768 oscillator available? */
#define CLOCK_HAS_XOSC32  (1)

The rest of the parameters can simply be computed by the given data:
case 0: compute MUL and DIV
case 1: compute data from CLOCK_CORECLOCK
case 2: compute N from CLOCK_CORECLOCK

What do you think?

@@ -34,16 +34,17 @@ extern "C" {
#endif

/**
* @brief External oscillator and clock configuration
* @name External oscillator and clock configuration
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

space missing


#if CLOCK_USE_PLL
/* edit these values to adjust the PLL output frequency */
/* edit these values to adjust the PLL output frequency */
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

these indention seems to be off


/**
* @brief Default Clock configurations
*/
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think doxygen will be more happy if you use

/**
 * @name ...
 * @{
 */

/** @} */

here.

* @brief Default Clock configurations
*/

/* If RTC or RTT is on Need XOSC32 */
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

is in need of?

#ifndef GEN2_XOSC32
#define GEN2_XOSC32 (1)
#endif
#endif
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I must say I am not so happy with the RTC/RTT dependency here. I would prefer that the cpu clock module merely provides functions to enable/disable the low frequency clock, which then in term can be used by the RTT/RTC. This is how we recently refactored the clock code for the stm32 family...

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

So more precise: IMHO the board config should only define if an external 32khz oscillator is available, and the RTC/RTT modules should then simply request enabling that clock from this module.

Or of course the XOSC32K clock is enabled during system initialization in case it is configured to be feeding the PLL.

@photonthunder
Copy link
Author

@haukepetersen thanks for looking at this. I do like your comments about core clock configuration since I imagine more options will be introduce in the future. I also like the idea of doing an enable/disable function, I will look at the stm32 code and try to mimic.

@photonthunder
Copy link
Author

photonthunder commented Aug 29, 2017

In this version there is just two parameters visible by default for core clock configuration (CLOCK_SRC and CLOCK_CORECLOCK). Interesting thing is that I found what could be a bug in gpio.c where it uses the generic clock generator 2. Well in the old code clock generator 2 was either the ultra low power 32 kHz or the external oscillator. All three modes do appear to work for the samd21-xpro. I also rebased before making these changes.

@travisgriggs
Copy link
Contributor

Hi @kaspar030 and @haukepetersen. Are we on the right direction with this still here? We would love to see this go in. It would make our own maintenance with RIOT a lot simpler since we use this in production.

@photonthunder photonthunder force-pushed the samd21_clock branch 2 times, most recently from 41d84c1 to 66e08f3 Compare September 12, 2017 19:49
@photonthunder
Copy link
Author

updated external interrupt gpio so that it uses XOSC32 if it is available. Gives better response on interrupt.

@dylad
Copy link
Member

dylad commented Jul 31, 2018

@photonthunder looks like Travis is complaining again. Still some whitespaces in the wild.

@photonthunder photonthunder force-pushed the samd21_clock branch 2 times, most recently from f248dd9 to 5c57481 Compare August 1, 2018 19:36
@photonthunder
Copy link
Author

Fingers crossed this time...

@dylad dylad added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Aug 2, 2018
@dylad
Copy link
Member

dylad commented Aug 2, 2018

Murdock approves. I'll try the PR on a samd21 ASAP just to make sure boards still run.

Copy link
Member

@dylad dylad left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@photonthunder I ran some tests on arduino-zero-like board this looks good except RTC which is broken.

Here some outputs with your branch vs master branch :

2018-08-03 09:32:46,521 - INFO # main(): This is RIOT! (Version: 2018.07-devel-1052-g5c57-dylan-meso-samd21_clock)
2018-08-03 09:32:46,522 - INFO # 
2018-08-03 09:32:46,524 - INFO # RIOT RTC low-level driver test
2018-08-03 09:32:46,529 - INFO # This test will display 'Alarm!' every 5 seconds for 4 times
2018-08-03 09:32:46,533 - INFO #   Setting clock to   2011-12-13 14:15:15
2018-08-03 09:32:46,538 - INFO # Clock value is now   2011-12-13 14:15:15
2018-08-03 09:32:46,542 - INFO #   Setting alarm to   2011-12-13 14:15:20
2018-08-03 09:32:46,546 - INFO #    Alarm is set to   2011-12-13 14:15:20
2018-08-03 09:32:46,547 - INFO # 
2018-08-03 09:32:46,702 - INFO # Alarm!
2018-08-03 09:32:46,858 - INFO # Alarm!
2018-08-03 09:32:47,015 - INFO # Alarm!
2018-08-03 09:32:47,171 - INFO # Alarm!
2018-08-03 09:34:01,465 - INFO # main(): This is RIOT! (Version: 2018.07-devel-907-g446f-dylan-meso)
2018-08-03 09:34:01,466 - INFO # 
2018-08-03 09:34:01,468 - INFO # RIOT RTC low-level driver test
2018-08-03 09:34:01,473 - INFO # This test will display 'Alarm!' every 5 seconds for 4 times
2018-08-03 09:34:01,477 - INFO #   Setting clock to   2011-12-13 14:15:15
2018-08-03 09:34:01,522 - INFO # Clock value is now   2011-12-13 14:15:15
2018-08-03 09:34:01,526 - INFO #   Setting alarm to   2011-12-13 14:15:20
2018-08-03 09:34:01,541 - INFO #    Alarm is set to   2011-12-13 14:15:20
2018-08-03 09:34:01,541 - INFO # 
2018-08-03 09:34:07,478 - INFO # Alarm!
2018-08-03 09:34:12,478 - INFO # Alarm!
2018-08-03 09:34:17,478 - INFO # Alarm!
2018-08-03 09:34:22,477 - INFO # Alarm!

I just changed PERIOD from 2 to 5 in tests/periph_rtc (but same behaviour with PERIOD = 2)

@photonthunder
Copy link
Author

@dylad, I know this is going to sound crazy but I think that is correct since the default option is running without standby on, so RTC doesn't run in deep sleep mode. This is why I started Issue #7913 to try and come up with a better approach. Will you try the same test but change setup_gen2_xosc32(false); to true and check the result?

@dylad
Copy link
Member

dylad commented Aug 5, 2018

THB, I don't think its a good idea to disable RTC by default. Users may want to use calendar, or trigger an event at specific time.
As long as MODULE_PERIPH_RTC is present, RTC must be enable for user.

@photonthunder
Copy link
Author

So the existing code for RTC has standby off by default. That doesn't mean RTC is off it just means that it doesn't run in sleep. I think this is the larger issue that needs to be addressed with these chips is a method for indicating that whether or not you want things running in standby mode, which needs to occur when you setup the initial clock generators. Thus you need a whole bunch of defines which quickly gets overwhelming for users.

@dylad
Copy link
Member

dylad commented Aug 8, 2018

@photonthunder I agree with you. We need a way to enable/disable standby mode efficiently. But in the current state, tests/periph_rtc doesn't work with this PR (standby mode or not) this need to be fix. We can then think about how to enable/disable standby features later.

@photonthunder
Copy link
Author

@dylad sounds good, so did you try it with with standby enabled? setup_gen2_xosc32(true); Did the test pass?

@dylad
Copy link
Member

dylad commented Aug 8, 2018

I cannot run any tests as I am on vacation right now.
If someone can test it would be great.
Anyway, If this works with setup_gen2_xosc32(true) then this PR need to be adapted as well

@photonthunder photonthunder force-pushed the samd21_clock branch 2 times, most recently from e69b715 to 346bda1 Compare August 13, 2018 17:12
@photonthunder
Copy link
Author

photonthunder commented Aug 13, 2018

Updated to true, but I am on the road and don't have hardware to test...

@dylad
Copy link
Member

dylad commented Sep 21, 2018

I just retested this PR, (Sorry for the delay, I had to order another board because the previous died)
tests/periph_rtc still don't have the required behaviour.

@keestux
Copy link
Contributor

keestux commented Apr 30, 2019

What's the status of this PR?

Oh, and by the way, the commit message has "...all clock generators in clock.c", but there is no clock.c. Is that an old commit message?

@photonthunder
Copy link
Author

The whole thing is very old. I explored other methods to try and handle the challenge that each peripheral is tied back to a GCLK and how to make that interactive without so many options (see #7913) but I haven't touched this in a long time so it probably needs a clean look.. probably just close this and someone can start a new PR if they desire...

@keestux
Copy link
Contributor

keestux commented Apr 30, 2019

Testing with Sodaq ONE (with a modified periph_conf.h, because it is missing in the patch) gives incorrect timing of tests/periph_rtc. All Alarm messages are printed at once. There should be a 2s delay between them.

tests/periph_rtt seems to behave properly.

@photonthunder
Copy link
Author

Feel free to hack away if you have time and interest. I may be able to look at this later this week or next week. I just figured most people where just hacking what they needed for each specific board?

@keestux
Copy link
Contributor

keestux commented Apr 30, 2019

I should have shown more interest long time ago. Sorry about that.

@stale
Copy link

stale bot commented Nov 1, 2019

This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions.

@stale stale bot added the State: stale State: The issue / PR has no activity for >185 days label Nov 1, 2019
@stale stale bot closed this Dec 2, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Area: timers Area: timer subsystems CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms State: stale State: The issue / PR has no activity for >185 days
Projects
None yet
Development

Successfully merging this pull request may close these issues.