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Thomas Roehl edited this page Jun 29, 2015
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One big novelty in LIKWID 4 are counter options to further filter or extend the incrementing events. Most LIKWID counters can be configured through the config registers but some require the programming of additional registers.
Option name | Description |
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anythread | This options enables counting the associated event conditions occurring across all logical processors sharing a processor core. |
kernel | Specifies that the selected microarchitectural condition is also counted when the logical processor is operating at privilege level 0 |
edgedetect | Enables (when set) edge detection of the selected microarchitectural condition. The logical processor counts the number of deasserted to asserted transitions for any condition that can be expressed by the other fields. The mechanism does not permit back-to-back assertions to be distinguished. This mechanism allows software to measure not only the fraction of time spent in a particular state, but also the average length of time spent in such a state (for example, the time spent waiting for an interrupt to be serviced). |
invert | When set, inverts the counter-mask (CMASK) comparison, so that both greater than or equal to and less than comparisons can be made (0: greater than or equal; 1: less than). Note if counter-mask is programmed to zero, INV flag is ignored. |
occ_edgedetect | Rather than accumulating the raw count each cycle (for events that can increment by 1 per cycle), the register can capture transitions from no event to an event incoming for the PCU’s occupancy events. Notice: Only for WBOX uncore counters. |
occ_invert | Changes the threshold test condition to ‘<‘ for the occupancy events. Notice: Only for WBOX uncore counters. |
in_transaction | When set, the counter will only include counts that occurred inside a transactional region, regardless of whether that region was aborted or committed. This bit may only be set if the processor supports HLE or RTM. Notice: Only for TSX aware systems (Haswell and newer). |
in_transaction_aborted | When set, the counter will not include counts that occurred inside of an aborted transactional region. This bit may only be set if the processor supports HLE or RTM. Notice: Only for TSX aware systems (Haswell and newer). |
Option name=argument | Description |
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threshold=0xXXXX | When this field is not zero, a logical processor compares this mask to the events count of the detected microarchitectural condition during a single cycle. If the event count is greater than or equal to this mask, the counter is incremented by one. Otherwise the counter is not incremented. This mask is intended for software to characterize microarchitectural conditions that can count multiple occurrences per cycle (for example, two or more instructions retired per clock; or bus queue occupations). If the counter-mask field is 0, then the counter is incremented each cycle by the event count associated with multiple occurrences. |
opcode=argument | Filter event stream to count only events with matching opcode |
nid=argument | Filter event stream to count only events with matching NUMA node ID. |
tid=argument | Filter event stream to count only events with matching thread ID. |
state=argument | Filter event stream to count only events with matching state, e.g. for cache lines. |
occupancy=argument | Filter event stream to count only events when event target is occupied with argument. For example, if a queue is known to contain eight entries, it may be useful to know how often it contains 6 or more entires (i.e. Almost Full) or when it contains 1 or more entries (i.e. Not Empty). |
occupancy_filter=argument | Filter event stream to count only events when event target is occupied and fit the given filter. Notice: Only for WBOX uncore counters. |
match<0-3>=argument | Generic options used mainly for setting external filter registers to match something specific. For example, the options match0 and match1 are used to filter offcore events for the event OFFCORE_RESPONSE_0_OPTIONS, where match0 sets the request part and match1 the response part of the OFFCORE_RESPONSE register. |
mask<0-3>=argument | Generic options used mainly for setting external filter registers to mask something specific. Often used in combination with the match<0-3> events. |
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Applications
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Config files
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Daemons
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Architectures
- Available counter options
- AMD
- Intel
- Intel Atom
- Intel Pentium M
- Intel Core2
- Intel Nehalem
- Intel NehalemEX
- Intel Westmere
- Intel WestmereEX
- Intel Xeon Phi (KNC)
- Intel Silvermont & Airmont
- Intel Goldmont
- Intel SandyBridge
- Intel SandyBridge EP/EN
- Intel IvyBridge
- Intel IvyBridge EP/EN/EX
- Intel Haswell
- Intel Haswell EP/EN/EX
- Intel Broadwell
- Intel Broadwell D
- Intel Broadwell EP
- Intel Skylake
- Intel Coffeelake
- Intel Kabylake
- Intel Xeon Phi (KNL)
- Intel Skylake X
- Intel Cascadelake SP/AP
- Intel Tigerlake
- Intel Icelake
- Intel Icelake X
- Intel SappireRapids
- Intel GraniteRapids
- Intel SierraForrest
- ARM
- POWER
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Tutorials
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Miscellaneous
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Contributing