Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Fix SV dma read function to work with unprintable chars and fix string not cleared issue #412

Closed
wants to merge 1 commit into from
Closed

Fix SV dma read function to work with unprintable chars and fix string not cleared issue #412

wants to merge 1 commit into from

Conversation

da-steve101
Copy link

There are two issues in the sv_fpga_start_cl_to_buffer function.
The first is that it will not work with multiple string termination chars '\0'
The second is that in the case of multiple transfers, the string in rd_buffer just appends the new transfer on the end of the first one. For example, if str1 is the first transfer, str2 is the second etc.
rd_buffer = str1 // after first transfer
rd_buffer = str1 + str2 // after 2nd transfer
rd_buffer = str1 + str2 + str3 // after 2nd transfer
but will still just return str1 as those are the first 'buf_size' bytes.

Few things with my PR:

  1. should remove buf_size arg but might break code :/
  2. BUF_SIZE should be read in from a makefile or from code somewhere. Can't use buf_size unfortunately as can't be dynamic size.
  3. Only tested using the AWS AMI with vivado

Stephen

Fix SV dma read function:
36654de 
> Now works with unprintable chars
> Now returns correct data as was previously just adding to the existing string
@Licheng-Guo
Copy link

Hi Steve,

Nice to meet you. I also suffered the problem that sv_fpga_start_cl_to_buffer fails if the data contains multiple '\0'. Could you please share how you fix this problem? Great thanks!

Best,
Licheng

@da-steve101
Copy link
Author

Sorry for the slow reply @Licheng-Guo. This is my fix for unprintable chars, should work for multiple '/0' chars. Basically transmit aws implemented as a string meaning it gets truncated. I changed to a byte array. My approach means you have to define the buffer size as a constant in: https://github.com/aws/aws-fpga/pull/412/files#diff-1da3b65937a698e303cf48b9305e78f2R19

AWSaalluri added a commit that referenced this pull request Apr 11, 2019
@AWSaalluri
RELEASE V1.4.8
aad6da3 
* FPGA developer kit supports Xilinx SDx/Vivado 2018.3
* [Python bindings for AWS FPGA MGMT Tools](sdk/userspace/python_bindings/README.md)
* Fixed Issues
   * [Fixes printf in main of fpga_local_cmd](#450)
   * [Fixes SV dma read function to work with unprintable chars](#412)
   * [Fixes Segmentation Fault in cl_sde simulation test](https://forums.aws.amazon.com/thread.jspa?threadID=298946&tstart=0)
   * Fixes test issues in cl_dram_dma example when using the AXI memory model for faster simulations
* Deprecated Features
   * As announced in HDK 1.4.6 all EDMA driver code has been removed and deprecated from the developer kit.
AWSaalluri added a commit that referenced this pull request Apr 12, 2019
@AWSaalluri
RELEASE V1.4.8
9057c58 
* FPGA developer kit supports Xilinx SDx/Vivado 2018.3
* [Python bindings for AWS FPGA MGMT Tools](sdk/userspace/python_bindings/README.md)
* Fixed Issues
   * [Fixes printf in main of fpga_local_cmd](#450)
   * [Fixes SV dma read function to work with unprintable chars](#412)
   * [Fixes Segmentation Fault in cl_sde simulation test](https://forums.aws.amazon.com/thread.jspa?threadID=298946&tstart=0)
   * Fixes test issues in cl_dram_dma example when using the AXI memory model for faster simulations
* Deprecated Features
   * As announced in HDK 1.4.6 all EDMA driver code has been removed and deprecated from the developer kit.
AWSaalluri added a commit that referenced this pull request Apr 12, 2019
@AWSaalluri
RELEASE V1.4.8
0f67805 
* FPGA developer kit supports Xilinx SDx/Vivado 2018.3
* [Python bindings for AWS FPGA MGMT Tools](sdk/userspace/python_bindings/README.md)
* Fixed Issues
   * [Fixes printf in main of fpga_local_cmd](#450)
   * [Fixes SV dma read function to work with unprintable chars](#412)
   * [Fixes Segmentation Fault in cl_sde simulation test](https://forums.aws.amazon.com/thread.jspa?threadID=298946&tstart=0)
   * Fixes test issues in cl_dram_dma example when using the AXI memory model for faster simulations
* Deprecated Features
   * As announced in HDK 1.4.6 all EDMA driver code has been removed and deprecated from the developer kit.
@deeppat
Copy link
Contributor

deeppat commented Apr 17, 2019

@da-steve101 @Licheng-Guo a fix was released in the latest release(v1.4.8). I'm closing this PR but feel free to reach out to us or re-open if the fix doesn't work for you!

Thanks,

Deep

@deeppat deeppat closed this Apr 17, 2019
kyyalama2 pushed a commit that referenced this pull request May 24, 2022
@AWShimasajj @AWSaalluri
Aw shimasajja ddr bdr ld 1 (#412)
1e0eb6d 
* Added a fix for 64 byte aligned addresses

* Added FATAL message and removed unaligned addresses in test

* Removed display statements used for debug

* Removed old code which is no longer required

* Corrected spaces

* Added back DMA_TEST define to makefiles (#308)

Merging into AWShimasajja-dma-fatal-add branch

* Added backdoor loading files

* Updated backdoor loading

* Tie off the AWBURST and ARBURST ports

* Added code to tie off burst ports

* Added axi4_bfm

* AXI memory model updates

* Updates for AXI mem model.

* Removed defines for Micron model debug

* Added documentation

* Added DDR backdoor loading tests and AXI memory model tests

* Sample memory text file

* Removed FAST mode from cadence makefile

* Fixed configuration in backdoor loading text file

* AXI memory model changes and DDR backdoor loading fixes

* Added code to name generate block

* Update README.md

Added description for AXI memory model and DDR backdoor loading.

* Update README.md

Added documentation for each test.

* Update README.md

Added italics

* Update README.md

More fixes

* More DDR backdoor loading test changes

* backdoor access files

* Added patch to rename generate block in sh_ddr

* Fixed DMA backdoor loading tests

* Fix for ready signals

* Added header to .mem files

* Added headers

* Removed axi4_bfm. Not needed anymore

* Removed old backdoor loading test file

* Update README.md

-Test covered in ddr backdoor walking ones

* Added headers

* Encryption changes

* Updated customer flow simulation testing

* Updated common makefile to move sed commands

* Moved sed commands away from target

* Fixed Makefile commands
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers
No reviews
Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
4 participants
@da-steve101 @Licheng-Guo @deeppat @AWSaalluri