Don't emit implicit clock warnings for SyncReadMem.readWrite when e…

…xplicit clocks are used (backport #3313) (#3315)

* Don't emit implicit clock warnings when an explicit clock is used (#3313)

(cherry picked from commit 9e39201)

# Conflicts:
#	core/src/main/scala/chisel3/Mem.scala

* Resolve backport conflicts

---------

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

core/src/main/scala/chisel3/Mem.scala

@@ -475,7 +475,7 @@ sealed class SyncReadMem[T <: Data] private[chisel3] (t: T, n: BigInt, val readU
     implicit sourceInfo: SourceInfo,
     compileOptions:      CompileOptions
   ): T =
-    _readWrite_impl(idx, data, en, isWrite, clock, true)
+    _readWrite_impl(idx, data, en, isWrite, clock, false)
 
   /** @group SourceInfoTransformMacro */
   private def _readWrite_impl(
@@ -580,7 +580,7 @@ sealed class SyncReadMem[T <: Data] private[chisel3] (t: T, n: BigInt, val readU
     implicit evidence: T <:< Vec[_],
     sourceInfo:        SourceInfo,
     compileOptions:    CompileOptions
-  ): T = masked_readWrite_impl(idx, writeData, mask, en, isWrite, clock, true)
+  ): T = masked_readWrite_impl(idx, writeData, mask, en, isWrite, clock, false)
 
   private def masked_readWrite_impl(
     addr:    UInt,