[svsim] Expose further verilator options for trace file name and simulation speed optimization

src/main/scala/chisel3/simulator/package.scala

@@ -78,10 +78,11 @@ package object simulator {
       elaboratedModule:              ElaboratedModule[T],
       conservativeCommandResolution: Boolean = false,
       verbose:                       Boolean = false,
+      traceEnabled:                  Boolean = false,
       executionScriptLimit:          Option[Int] = None
     )(body:                          SimulatedModule[T] => U
     ): U = {
-      simulation.run(conservativeCommandResolution, verbose, executionScriptLimit) { controller =>
+      simulation.run(conservativeCommandResolution, verbose, traceEnabled, executionScriptLimit) { controller =>
         val module = new SimulatedModule(elaboratedModule, controller)
         AnySimulatedModule.withValue(module) {
           body(module)

svsim/src/main/scala/Backend.scala

@@ -36,6 +36,10 @@ object CommonCompilationSettings {
     /** Optimize for compilation speed, which generally means disabling as many optimizations as possible.
       */
     object OptimizeForCompilationSpeed extends OptimizationStyle
+
+    /** Optimize for execution speed, which generally means enabling as many optimizations as possible.
+      */
+    object OptimizeForSimulationSpeed extends OptimizationStyle
   }
 
   sealed trait AvailableParallelism

svsim/src/main/scala/Simulation.scala

@@ -17,6 +17,7 @@ final class Simulation private[svsim] (
   def run[T](
     conservativeCommandResolution: Boolean = false,
     verbose:                       Boolean = false,
+    traceEnabled:                  Boolean = false,
     executionScriptLimit:          Option[Int] = None
   )(body:                          Simulation.Controller => T
   ): T = {
@@ -40,13 +41,20 @@ final class Simulation private[svsim] (
       processBuilder.environment().put(pair._1, pair._2)
     }
     val process = processBuilder.start()
+    sys.addShutdownHook {
+      if (process.isAlive())
+        process.destroyForcibly()
+    }
     val controller = new Simulation.Controller(
       new BufferedWriter(new OutputStreamWriter(process.getOutputStream())),
       new BufferedReader(new InputStreamReader(process.getInputStream())),
       moduleInfo,
       conservativeCommandResolution = conservativeCommandResolution,
       logMessagesAndCommands = verbose
     )
+    if (traceEnabled) {
+      controller.setTraceEnabled(true)
+    }
     val bodyOutcome = Try {
       val result = body(controller)
       // Exceptions thrown from commands still in the queue when `body` returns should supercede returning `result`

svsim/src/main/scala/Workspace.scala

@@ -278,10 +278,18 @@ final class Workspace(
       .flatMap(_.listFiles())
       .map { file => workingDirectory.toPath().relativize(file.toPath()).toString() }
 
+    val traceFileStem = (backendSpecificSettings match {
+      case s: verilator.Backend.CompilationSettings =>
+        s.traceStyle.collectFirst {
+          case verilator.Backend.CompilationSettings.TraceStyle.Vcd(_, filename: String) if filename.nonEmpty =>
+            filename.stripSuffix(".vcd")
+        }
+      case _ => None
+    }).getOrElse(s"$workingDirectoryPath/trace")
     val simulationEnvironment = Seq(
       "SVSIM_SIMULATION_LOG" -> s"$workingDirectoryPath/simulation-log.txt",
       // The simulation driver appends the appropriate extension to the file path
-      "SVSIM_SIMULATION_TRACE" -> s"$workingDirectoryPath/trace"
+      "SVSIM_SIMULATION_TRACE" -> traceFileStem
     ) ++ parameters.simulationInvocation.environment
 
     // Emit Makefile for debugging (will be emitted even if compile fails)

svsim/src/main/scala/vcs/Backend.scala

@@ -162,6 +162,7 @@ final class Backend(
               commonSettings.optimizationStyle match {
                 case OptimizationStyle.Default => Seq()
                 case OptimizationStyle.OptimizeForCompilationSpeed => Seq("-O0")
+                case OptimizationStyle.OptimizeForSimulationSpeed=> Seq("-O3")
               },
 
               additionalHeaderPaths.map { path => s"-I${path}" },

svsim/src/main/scala/verilator/Backend.scala

@@ -10,7 +10,7 @@ object Backend {
   object CompilationSettings {
     sealed trait TraceStyle
     object TraceStyle {
-      case class Vcd(traceUnderscore: Boolean = false) extends TraceStyle
+      case class Vcd(traceUnderscore: Boolean = false, filename: String = "") extends TraceStyle
     }
   }
 
@@ -55,6 +55,7 @@ final class Backend(
             "--cc", // "Create C++ output"
             "--exe", // "Link to create executable"
             "--build", // "Build model executable/library after Verilation"
+            "-j", "0", // Parallelism for --build-jobs/--verilate-jobs, when 0 uses all available cores
             "-o", s"../$outputBinaryName", // "Name of final executable"
             "--top-module", topModuleName, // "Name of top-level input module"
             "--Mdir", "verilated-sources",  // "Name of output object directory"
@@ -76,7 +77,7 @@ final class Backend(
           },
 
           backendSpecificSettings.traceStyle match {
-            case Some(TraceStyle.Vcd(traceUnderscore)) => 
+            case Some(TraceStyle.Vcd(traceUnderscore, _)) =>
               if (traceUnderscore) {
                 Seq("--trace", "--trace-underscore")
               } else {
@@ -97,6 +98,8 @@ final class Backend(
           commonSettings.optimizationStyle match {
             case OptimizationStyle.Default => Seq()
             case OptimizationStyle.OptimizeForCompilationSpeed => Seq("-O1")
+            case OptimizationStyle.OptimizeForSimulationSpeed =>
+              Seq("-O3", "--x-assign", "fast", "--x-initial", "fast")
           },
 
           Seq[(String, Option[String])](
@@ -118,6 +121,8 @@ final class Backend(
               commonSettings.optimizationStyle match {
                 case OptimizationStyle.Default => Seq()
                 case OptimizationStyle.OptimizeForCompilationSpeed => Seq("-O1")
+                case OptimizationStyle.OptimizeForSimulationSpeed =>
+                  Seq("-O3", "-march=native", "-mtune=native")
               },
 
               Seq("-std=c++14"),