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User bits overhaul #2326

Merged
merged 5 commits into from
Mar 13, 2020
Merged

User bits overhaul #2326

merged 5 commits into from
Mar 13, 2020

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terpstra
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Completely replace user bits in every rocket-chip diplomatic bus. One application is that we can now carry AMBA-style protection bits between AMBA adapters over a TileLink-based SoC.

Type of change: other enhancement
Impact: API modification
Development Phase: implementation

@terpstra terpstra requested a review from hcook March 10, 2020 04:49
@terpstra terpstra changed the base branch from master to improved-user-bits March 10, 2020 04:50
@hcook hcook changed the title User bits overhall User bits overhaul Mar 10, 2020
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hcook commented Mar 10, 2020

Looks good to me, modulo what we discussed about intersection vs union of the master and slave sides.

BundleMap is really powerful.

@terpstra terpstra force-pushed the improved-user-bits branch from 4722b7f to b588c0b Compare March 11, 2020 01:27
@terpstra terpstra force-pushed the user-bits-overhall branch 2 times, most recently from 21e3b8a to fc5761a Compare March 12, 2020 16:07
@terpstra terpstra changed the base branch from improved-user-bits to master March 12, 2020 16:31
@terpstra terpstra force-pushed the user-bits-overhall branch from f72ba68 to 7fefa0c Compare March 12, 2020 17:26
@terpstra terpstra force-pushed the user-bits-overhall branch from d7a7267 to 4cb3766 Compare March 13, 2020 01:06
@terpstra terpstra force-pushed the user-bits-overhall branch from 4cb3766 to bb28123 Compare March 13, 2020 01:22
The bridge behaviour before the introduction of AMBAProt:
APB  pprot = 1	=> priv, secure, !fetch
AHB  hprot = 3	=> priv,         !fetch, !buffer, !cache
AXI4 prot  = 1  => priv, secure, !fetch
AXI4 cache = 0  =>                       !buffer, !cache, !modify
@terpstra terpstra merged commit 6f2f91a into master Mar 13, 2020
@terpstra terpstra deleted the user-bits-overhall branch March 13, 2020 05:48
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2 participants