evp: Implement execution remap peripheral (EVP)

clicky-core/src/devices/platform/pp.rs

@@ -7,6 +7,7 @@ mod cpuid;
 mod devcon;
 mod dma;
 mod eide;
+mod evp;
 mod flash;
 mod gpio;
 mod i2c;
@@ -27,6 +28,7 @@ pub use cpuid::*;
 pub use devcon::*;
 pub use dma::*;
 pub use eide::*;
+pub use evp::*;
 pub use flash::*;
 pub use gpio::*;
 pub use i2c::*;

clicky-core/src/devices/platform/pp/cachecon.rs

@@ -4,7 +4,7 @@ use crate::devices::prelude::*;
 #[derive(Debug)]
 pub struct CacheCon {
     /// Local exception vector table enable (bit 4)
-    local_evt: bool,
+    pub local_evt: bool,
     /// Cache control enable (bit 1)
     cache_ctrl_enable: bool,
 }
@@ -54,9 +54,6 @@ impl Memory for CacheCon {
         match offset {
             0x00 => {
                 self.local_evt = val.get_bit(4);
-                if self.local_evt {
-                    return Err(Fatal("local exception vector table not implemented".into()));
-                }
                 self.cache_ctrl_enable = val.get_bit(1);
                 Err(StubWrite(Error, ()))
             }

clicky-core/src/devices/platform/pp/evp.rs

@@ -0,0 +1,81 @@
+use crate::devices::prelude::*;
+
+/// Returns different value based on which CPU accesses it.
+#[derive(Debug)]
+pub struct Evp {
+    reset_vec: u32,
+    undefined_instr_vec: u32,
+    soft_irq_vec: u32,
+    prefetch_abrt_vec: u32,
+    data_abrt_vec: u32,
+    reserved_vec: u32,
+    normal_irq_vec: u32,
+    high_priority_irq_vec: u32,
+}
+
+impl Evp {
+    pub fn new() -> Evp {
+        Evp {
+            reset_vec: 0x0,
+            undefined_instr_vec: 0x4,
+            soft_irq_vec: 0x8,
+            prefetch_abrt_vec: 0xC,
+            data_abrt_vec: 0x10,
+            reserved_vec: 0x14,
+            normal_irq_vec: 0x18,
+            high_priority_irq_vec: 0x1C,
+        }
+    }
+}
+
+impl Device for Evp {
+    fn kind(&self) -> &'static str {
+        "EVP (Exception Vector ???)"
+    }
+
+    fn probe(&self, offset: u32) -> Probe {
+        let reg = match offset {
+            0x0 => "Reset Exception Handler",
+            0x4 => "Undefined Instruction Handler",
+            0x8 => "Software Interrupt Handler",
+            0xC => "Prefetch Abort Handler",
+            0x10 => "Data Abort Handler",
+            0x14 => "Reserved Handler",
+            0x18 => "Normal-priority Interrupt Handler",
+            0x1C => "High-priority Interrupt Handler",
+            _ => return Probe::Unmapped,
+        };
+
+        Probe::Register(reg)
+    }
+}
+
+impl Memory for Evp {
+    fn r32(&mut self, offset: u32) -> MemResult<u32> {
+        match offset {
+            0x0 => Err(StubRead(Error, self.reset_vec)),
+            0x4 => Err(StubRead(Error, self.undefined_instr_vec)),
+            0x8 => Err(StubRead(Error, self.soft_irq_vec)),
+            0xC => Err(StubRead(Error, self.prefetch_abrt_vec)),
+            0x10 => Err(StubRead(Error, self.data_abrt_vec)),
+            0x14 => Err(StubRead(Error, self.reserved_vec)),
+            0x18 => Err(StubRead(Error, self.normal_irq_vec)),
+            0x1C => Err(StubRead(Error, self.high_priority_irq_vec)),
+            _ => Err(Unexpected),
+        }
+    }
+
+    fn w32(&mut self, offset: u32, val: u32) -> MemResult<()> {
+        match offset {
+            0x0 => Ok(self.reset_vec = val),
+            0x4 => Ok(self.undefined_instr_vec = val),
+            0x8 => Ok(self.soft_irq_vec = val),
+            0xC => Ok(self.prefetch_abrt_vec = val),
+            0x10 => Ok(self.data_abrt_vec = val),
+            0x14 => Ok(self.reserved_vec = val),
+            0x18 => Ok(self.normal_irq_vec = val),
+            0x1C => Ok(self.high_priority_irq_vec = val),
+            _ => Err(InvalidAccess),
+        }
+    }
+}

clicky-core/src/sys/ipod4g/mod.rs

@@ -347,6 +347,7 @@ pub struct Ipod4gBus {
     pub dmacon: devices::DmaCon,
     pub serial0: devices::Serial,
     pub serial1: devices::Serial,
+    pub evp: devices::Evp,
 
     pub mystery_irq_con: devices::Stub,
     pub mystery_lcd_con: devices::Stub,
@@ -437,6 +438,7 @@ impl Ipod4gBus {
             dmacon,
             serial0: Serial::new("0"),
             serial1: Serial::new("1"),
+            evp: Evp::new(),
 
             mystery_irq_con: Stub::new("Mystery IRQ Con?"),
             mystery_lcd_con: Stub::new("Mystery LCD Con?"),
@@ -460,7 +462,12 @@ macro_rules! mmap {
         macro_rules! impl_mem_r {
             ($fn:ident, $ret:ty) => {
                 fn $fn(&mut self, addr: u32) -> MemResult<$ret> {
-                    let (addr, prot) = self.memcon.virt_to_phys(addr);
+                    let mut addr = addr;
+                    if (0x00..0x1F).contains(&addr) && self.cachecon.local_evt {
+                        addr = addr | 0x6000_f100;
+                    }
+
+                    let (mut addr, prot) = self.memcon.virt_to_phys(addr);
                     if !prot.r {
                         return Err(MemException::MmuViolation)
                     }
@@ -559,6 +566,10 @@ mmap! {
         0xc300_0000..=0xc300_0fff => eidecon,
         0xf000_0000..=0xf000_ffff => memcon,
 
+        0x6000_f000..=0x6000_f01f => evp, // Tegra drivers mention 0x6000F1xx but 0x6000F0xx is mentioned in PP5020 RE litterature
+        0x6000_f100..=0x6000_f11f => evp, // I assume 0x6000F0xx and 0x6000F1xx are mirrored? Maybe one is used for the main CPU,
+                                          // the other is used for COP?
+
         // all the stubs
 
         0x6000_1038 => mystery_irq_con,
@@ -568,7 +579,6 @@ mmap! {
         0x6000_3000..=0x6000_30ff => total_mystery,
         0x6000_9000..=0x6000_90ff => total_mystery,
         // Diagnostics program reads from address, and write back 0x10000000
-        0x6000_f100..=0x6000_f11f => total_mystery,
         0x7000_3800 => total_mystery,
         0xc031_b1d8 => mystery_flash_stub,
         0xc031_b1e8 => mystery_flash_stub,