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[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; #61847
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b91555e
[Issue: 61620] Optimizing ARM64 for *x = 0;
SeanWoo ee617c7
Update src/coreclr/jit/lower.cpp
SeanWoo 36bc6b4
Fixed bug with * x = dConst if dConst is not 0
SeanWoo 0596430
remove extra printf
SeanWoo b9b0f55
Replacing IsFPZero with IsCnsNonZeroFltOrDbl for STOREIND Minor edits…
SeanWoo 9a2a2d5
fixed ARM codegen for STOREIND
SeanWoo 25f047e
Update src/coreclr/jit/lower.cpp
SeanWoo 153fd39
Update src/coreclr/jit/lower.cpp
SeanWoo d5dd56b
fix formatting
SeanWoo ec0f188
Merge branch 'issue-61620-ARM64' of https://github.com/SeanWoo/runtim…
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The pattern in
lower.cpp
is thatLowerCommonX
methods callLowerX
methods. It may be thatLowerStoreIndir
has modifiedind
by the time we check we check for our optimization opportunity.So I suggest a reorder: move the optimization before
LowerStoreIndir
. You should then be able to delete the#if
forSetContained
, as it would be dead code -LowerStoreIndir
should check for the containment as appropriate.Also: is containing all FP constants worth it (does it even work?) on ARM/ARM64? The codegen for things like
*x = 1.1
should be checked.There was a problem hiding this comment.
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Thank you for your comments.
I'll make a call to LowerStoreInd after optimization.
You made the right remarks. I will fix them and come back with new changes soon.