Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

updates to top level caravel #59

Merged
merged 10 commits into from
Apr 8, 2022
Merged

updates to top level caravel #59

merged 10 commits into from
Apr 8, 2022

Conversation

kareefardi
Copy link
Contributor

@kareefardi kareefardi commented Apr 8, 2022

This PR only updates:

  • caravel top level mag, def and the verilog gate-level netlist
  • mag views of xres_buf and copyright_block.

TODO:

  • (fully) update openlane configuration and interactive files for caravel
  • properly handle f633b11 by updating simple_por lef view.

kareefardi and others added 10 commits April 1, 2022 10:52
- add patch file for power routing def
    - gl
    - mag
    - def
- add caravel power routing def
isolated ground marker layer on the xres_buf layout.  Corrected
the power supply pin names on the gate level verilog netlist of
simple_por in caravel.v.  Updated the copyright block text.
Corrected DRC errors in the top level routing.
@kareefardi kareefardi changed the title updates top level caravel updates to top level caravel Apr 8, 2022
@jeffdi jeffdi merged commit c84e139 into main Apr 8, 2022
@kareefardi kareefardi deleted the caravel_re-routing branch July 19, 2022 20:48
@kareefardi kareefardi restored the caravel_re-routing branch July 19, 2022 20:59
M0stafaRady pushed a commit that referenced this pull request Sep 30, 2022
* REVERT ME: temporarily match simple_por pin in verilog with lef

* - update configs
- add patch file for power routing def

* - update the following caravel toplevel views
    - gl
    - mag
    - def
- add caravel power routing def

* Apply automatic changes to Manifest and README.rst

* update gl mag and def for caravel

* Revert "REVERT ME: temporarily match simple_por pin in verilog with lef"

This reverts commit b70c27c.

* update caravel gds

* Apply automatic changes to Manifest and README.rst

* Added text and logo cells back into the caravel top level.  Put an
isolated ground marker layer on the xres_buf layout.  Corrected
the power supply pin names on the gate level verilog netlist of
simple_por in caravel.v.  Updated the copyright block text.
Corrected DRC errors in the top level routing.

Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
@RTimothyEdwards RTimothyEdwards added PnR Gate level verilog and/or layout changed flow Makefile or in-repository flow script changed labels Oct 4, 2022
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
flow Makefile or in-repository flow script changed PnR Gate level verilog and/or layout changed
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants