Corrects STM32U5 memory sizes

[wagcampbell]

As mentioned in Matrix chat, this PR corrects memory sizes for the STM32U5 family.

Also, mentioned here:
#301 (comment)

Unfortunately I only have a NUCLEO-U575ZI-Q on me, so I am unable to test for other families.

As for testing, after making the change, I generated the stm32-metapac per instructions in the README.

Then, I copied build/* to a fork here:
https://github.com/wagcampbell/stm32-data-generated/tree/wgc/stm32u5-memory-fix

Then I added this change to my local embassy examples/stm32u5/Cargo.toml:

[patch.'https://github.com/embassy-rs/stm32-data-generated.git']
stm32-metapac = { git = "https://github.com/wagcampbell/stm32-data-generated", rev = "aba9d07d132e7a3ed0b83f29fa767fdf13d091a5" }

I'm trying to run some of the stm32 examples for the stm32u5, but embassy-stm32 is failing to compile 😆:

error[E0599]: no method named dr found for struct stm32_metapac::crc::Crc in the current scope

I see this, among other erroneous errors. Which leads me to believe I may have generated this incorrectly.

Thought, I get this PR started, but still trying to get a working test.

Thanks!

[embassy-ci]

diff: https://ci.embassy.dev/jobs/c91c95db3bc0/artifacts/diff.html

[wagcampbell]

After realizing the version of stm32-data-generated that is embassy/main branch is behind stm32-data-generated/main, I identified it's failing from this change:
embassy-rs/stm32-data-generated@1daa54f#diff-d7b7b65ae8752c3458b5f633120158dbf10a266569d009af9bc0bd5ae799d135L24

I made a handful of small changes locally to address this (e.g. dr -> dr32, txdr -> txdr32, rxdr -> rxdr32).

After making that change to embassy-stm32, I was able to the stm32u5 examples to compile.

Now I'm hitting an issue where I cannot read from addresses defined in BANK_2 💀

ERROR panicked at 'unwrap failed: f.blocking_read(ADDR, & mut buf)'
error: `Size`

Which, I'm testing by modifying the base ADDR in the examples/stm32u5/flash.rs.

Going to dig into this next.

[wagcampbell]

Correction, I am able to read if I select the correct bank 🤦‍♂️. I am able to read from both banks now.

let mut f = Flash::new_blocking(p.FLASH).into_blocking_regions().bank2_region;

That said, I am not able to erase without changes to the embassy-stm32/src/flash/u5.rs.

Specifically, I have to select the bank. In blocking_erase_sector, I made this change:

            match sector.bank {
                super::FlashBank::Bank1 => w.set_bker(pac::flash::vals::SeccrBker::B_0X0),
                super::FlashBank::Bank2 => w.set_bker(pac::flash::vals::SeccrBker::B_0X1),
                super::FlashBank::Otp => { panic!("Unsupported"); },
            }

With this change, I can read, erase, and write to bank 2 on the STM32U575ZI 😊.

I have an open PR that adds support for reading/writing to non-secure Flash:
embassy-rs/embassy#2792

Maybe this change to select banks can go there? Though, I guess it won't work until the changes from PR are merged 😅

[Dirbaio]

💯 thanks!