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update GPIO driver #246
update GPIO driver #246
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Ho3eintaji
commented
Apr 5, 2023
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edited
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edited
- Full GPIO driver
- Driver functions are put in several levels of abstraction. Although abstract functions like gpio_config wrap up several function calls by passing a configuration structure, the driver still provides lower-level functions.
- Apps are updated based on the driver
please check all the applications:) |
All the affected apps were updated |
…ious gpio functions
@JoseCalero conflicts with rv_plic commit must be resolved now. |
@JoseCalero should be ready now |
can you do a quick check about the conflicts on "example_power_gating_core/main.c" (it is due to one of the latest merges in main) |
done |
@Ho3eintaji i have done a check for all the apps, both in compilation and run mode. |
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can you run freertos app?
ok, i know what is happening, we modified the xdc constraint file for the pynq when we did the PDM integration, so we used pins 21 and 22. So, @Ho3eintaji no need to test it, i will modify the constraint file and the freertos app |
hi @JoseCalero - if you are using GPIOs 20 and 21, you do not need to modify the constraints file, just set the multiplexer to "GPIO mode" rather than "I2S mode".
In practice, in As you can see here, the So no need to modify the constraints file, but just modify the application to include those lines |
@Ho3eintaji can you add those changes to the freertos app? |
Yeah, I will change it. |
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When the I2S was introduced, it was decided to use GPIOs 20-22 (because they were the last ones).
These were already mapped to the RGB LED5, so they were re-mapped so that GPIOs 15-17 were assigned instead (in the pin_assign.xdc
).
This change was never reflected in the example_freertos_blinky
, which continued to use GPIOs 20-22.
The only change needed for it to work is to change the #define GPIO_LD5_* xx
to their proper numbers.
There is no mux to change, as I2S and LED5 go to different pins in the FPGA board.
I will make a PR to this branch with this change and a merge of main.
Just merged with main and fixed conflicts. Tested involved apps in verilator and are working. I did a pass over the HAL looks good to me. |
Great, thanks @JuanSapriza |
Update code from upstream repository https://github.com/esl- epfl/x-heep.git to revision 086884bed017d7778d1c6309533fdf0505a220e2 * Improved the comments on the eXtendingHEEP readme (esl- epfl/x-heep#360) (JuanSapriza) * Modified the way of realizing if an app is external or not (JuanSapriza) * add script to simulate all apps (esl-epfl/x-heep#341) (JuanSapriza) * [app] fix APPs on flash_exec (esl-epfl/x-heep#357) (Davide Schiavone) * adding attributes and mux pad parameters in mcu-gen (esl- epfl/x-heep#349) (Davide Schiavone) * change signal names in power manager to reflex polarity (esl- epfl/x-heep#352) (Simone Machetti) * fix power gating core app (esl-epfl/x-heep#355) (Davide Schiavone) * add cv32e40px (esl-epfl/x-heep#353) (Davide Schiavone) * moved fpnew in its own directory (esl-epfl/x-heep#351) (Davide Schiavone) * update cv32e40p divider (esl-epfl/x-heep#350) (Davide Schiavone) * fix external pad gen (esl-epfl/x-heep#346) (Davide Schiavone) * fix mcu-gen (esl-epfl/x-heep#345) (Davide Schiavone) * update GPIO driver (esl-epfl/x-heep#246) (Hossein Taji) * fix interleaved bus (esl-epfl/x-heep#340) (Daniel Vázquez) * fix esl-epfl/x-heep#338 (esl-epfl/x-heep#339) (Davide Schiavone) * Initialized variables to 0 inside functions. Removed printf comments (esl-epfl/x-heep#334) (JuanSapriza) * made the dma_is_ready() function non-optimizable at all. (esl- epfl/x-heep#333) (JuanSapriza) * fix SPI apps (esl-epfl/x-heep#327) (Davide Schiavone) * Include x-heep.h to all apps that need it (esl-epfl/x-heep#329) (JuanSapriza) * Added soc_ctrl-reg_top warning to waiver (esl-epfl/x-heep#326) (JuanSapriza) * fix several applications (esl-epfl/x-heep#325) (Davide Schiavone) * Tries to use cmake3. If that is not available, go ahead with cmake (esl-epfl/x-heep#323) (JuanSapriza) * Improve the timing of cv32e40x by removing the debug triggers (esl- epfl/x-heep#324) (David Mallasén Quintana) * refactoring of examples (esl-epfl/x-heep#322) (JuanSapriza) * expose internal master ports to external devices (esl- epfl/x-heep#268) (Michele Caon) * Interrupt ID to the intr handlers of the PLIC (esl-epfl/x-heep#315) (JuanSapriza) * add ports to DMA to write to addresses coming from port2 of DMA (esl-epfl/x-heep#320) (Davide Schiavone) * DMA HAL - clean PR (esl-epfl/x-heep#317) (JuanSapriza) * Cleaning up flags (esl-epfl/x-heep#316) (Davide Schiavone) * Add support for externally defined external pads in `Makefile` (esl- epfl/x-heep#312) (Michele Caon) * Linker load flash refactor fill memory (esl-epfl/x-heep#294) (jmiranda) * add i2s peripheral (esl-epfl/x-heep#203) (Tim Frey) * Add example ADC schematic (esl-epfl/x-heep#309) (Cyril) * Update `cv32e40x` version to `0.9.0` (esl-epfl/x-heep#308) (Michele Caon) * integration of an AMS peripheral example (esl-epfl/x-heep#270) (Cyril) * Update FuseSoC remote (esl-epfl/x-heep#307) (Michele Caon) * fix USE_SPI_FLASH for FPGA (esl-epfl/x-heep#301) (Davide Schiavone) * add ifdef peripheral included (esl-epfl/x-heep#288) (Davide Schiavone) * Added command in CI to include all peripherals before building. (esl-epfl/x-heep#293) (JuanSapriza) * fix esl-epfl/x-heep#291 (esl-epfl/x-heep#292) (Davide Schiavone) * fix example_power_gating_core app (esl-epfl/x-heep#286) (Simone Machetti) * fix esl-epfl/x-heep#266 and esl-epfl/x-heep#289 (esl- epfl/x-heep#290) (Davide Schiavone) * Added compilation warning. (esl-epfl/x-heep#287) (Simone Machetti) * fix Linux FEMU (esl-epfl/x-heep#285) (Simone Machetti) * added logo (esl-epfl/x-heep#283) (Simone Machetti) * update cv32e40p (esl-epfl/x-heep#269) (Davide Schiavone) * Add makefile variable for compiler prefix (esl-epfl/x-heep#278) (David Mallasén Quintana) * CI to verify that apps can be built on every push/PR (esl- epfl/x-heep#239) (JuanSapriza) * App fix + sh compilation script (esl-epfl/x-heep#267) (jmiranda) * update common cells (esl-epfl/x-heep#262) (Davide Schiavone) * crt logic update + CMake backend modifications (esl-epfl/x-heep#264) (jmiranda) * External peripheral app bug fix and refactor (esl-epfl/x-heep#259) (Stefano Albini) * Update CMakebackend (esl-epfl/x-heep#258) (jmiranda) * rv_plic HAL refactor (esl-epfl/x-heep#240) (Stefano Albini) * Add LICENSE (davide schiavone) * Add F-HEEP to the eXtendingHEEP list (esl-epfl/x-heep#257) (David Mallasén Quintana) * add fast interrupt enable register (esl-epfl/x-heep#256) (Tim Frey) * improved interrupt integration (esl-epfl/x-heep#255) (Tim Frey) * Peripherals structs _reserved fields renaming (esl-epfl/x-heep#254) (Stefano Albini) * adding bitfield_read/write functions (esl-epfl/x-heep#253) (Hossein Taji) * add interleaved bus (esl-epfl/x-heep#237) (Daniel Vázquez) * fix parameters when there are no external domains (esl- epfl/x-heep#247) (Davide Schiavone) * Corrected two comments and removed the FIC part in the power gating example. (esl-epfl/x-heep#248) (JuanSapriza) * make example external periph shorter (esl-epfl/x-heep#232) (Davide Schiavone) * Minor modification on Readme (esl-epfl/x-heep#245) (jmiranda) * Fixing APPs and Compilation issues + FreeRTOS HEAP mem (esl- epfl/x-heep#238) (jmiranda) * updating fast intr ctrl based on structure (esl-epfl/x-heep#235) (Hossein Taji) * [hw] adding peripheral inclusion/exclusion configuration (esl- epfl/x-heep#244) (Davide Schiavone) * add PDM2PCM peripheral (esl-epfl/x-heep#192) (grinningmosfet) * Peripherals struct multireg and address mismatch fix (esl- epfl/x-heep#234) (Stefano Albini) * fix for VCS (esl-epfl/x-heep#229) (Cyril) * Build external sources with external drivers (esl-epfl/x-heep#227) (JuanSapriza) * add verilator run app command (esl-epfl/x-heep#228) (Tim Frey) * add tc_clk_xor2 (esl-epfl/x-heep#225) (Tim Frey) * fix venv / conda envs (esl-epfl/x-heep#221) (Davide Schiavone) * update common cells (esl-epfl/x-heep#223) (Davide Schiavone) Signed-off-by: Juan Sapriza <juan.sapriza@epfl.ch>
Update code from upstream repository https://github.com/esl- epfl/x-heep.git to revision df569a88fc7eaa447645262f0d3a76dd22c519f7 * enable mcycle in matadd examples (esl-epfl/x-heep#413) (Davide Schiavone) * reduce FPGA frequencz to 15MHz to accomodate FPU (esl- epfl/x-heep#404) (Davide Schiavone) * fix cv32e4 verilator waivers (esl-epfl/x-heep#402) (Davide Schiavone) * fix GPIO HAL by adding selection of GPIO domain (esl- epfl/x-heep#385) (Davide Schiavone) * update vendor fpu_ss (esl-epfl/x-heep#397) (Davide Schiavone) * fix cv32e40px fpga (esl-epfl/x-heep#396) (Davide Schiavone) * add fpu over cv-x-if in tb (esl-epfl/x-heep#392) (Davide Schiavone) * SEGGER Embedded Studio support for X-HEEP (esl-epfl/x-heep#370) (jmiranda) * Squashed commit of the following: (jmiranda) * Always use `MCU_CFG` variable in `Makefile` (esl-epfl/x-heep#391) (Michele Caon) * update cv32e40p (esl-epfl/x-heep#389) (Davide Schiavone) * update cv32e40px (esl-epfl/x-heep#388) (Davide Schiavone) * use jtag i/o from harness when not using jtag dpi (esl- epfl/x-heep#379) (Davide Schiavone) * Fix esl-epfl/x-heep#336 (esl-epfl/x-heep#364) (JuanSapriza) * add minimal configuration for mcu-gen (esl-epfl/x-heep#378) (Davide Schiavone) * PLIC handlers array (esl-epfl/x-heep#363) (JuanSapriza) * Update README.md (jmiranda) * Choose linker compiler and sim/nosim in test_all.sh (esl- epfl/x-heep#359) (JuanSapriza) * Modified the two target header files so that they add a define with a value. That is then used to modify the PRINTF logic in all apps (esl-epfl/x-heep#361) (JuanSapriza) * add obi fifo stage to/from peripherals (esl-epfl/x-heep#200) (Davide Schiavone) * added support for clock-gating external subsystems (esl- epfl/x-heep#354) (Simone Machetti) * Improved the comments on the eXtendingHEEP readme (esl- epfl/x-heep#360) (JuanSapriza) * Modified the way of realizing if an app is external or not (JuanSapriza) * add script to simulate all apps (esl-epfl/x-heep#341) (JuanSapriza) * [app] fix APPs on flash_exec (esl-epfl/x-heep#357) (Davide Schiavone) * adding attributes and mux pad parameters in mcu-gen (esl- epfl/x-heep#349) (Davide Schiavone) * change signal names in power manager to reflex polarity (esl- epfl/x-heep#352) (Simone Machetti) * fix power gating core app (esl-epfl/x-heep#355) (Davide Schiavone) * add cv32e40px (esl-epfl/x-heep#353) (Davide Schiavone) * moved fpnew in its own directory (esl-epfl/x-heep#351) (Davide Schiavone) * update cv32e40p divider (esl-epfl/x-heep#350) (Davide Schiavone) * fix external pad gen (esl-epfl/x-heep#346) (Davide Schiavone) * fix mcu-gen (esl-epfl/x-heep#345) (Davide Schiavone) * update GPIO driver (esl-epfl/x-heep#246) (Hossein Taji) * fix interleaved bus (esl-epfl/x-heep#340) (Daniel Vázquez) * fix esl-epfl/x-heep#338 (esl-epfl/x-heep#339) (Davide Schiavone) * Initialized variables to 0 inside functions. Removed printf comments (esl-epfl/x-heep#334) (JuanSapriza) * made the dma_is_ready() function non-optimizable at all. (esl- epfl/x-heep#333) (JuanSapriza) * fix SPI apps (esl-epfl/x-heep#327) (Davide Schiavone) * Include x-heep.h to all apps that need it (esl-epfl/x-heep#329) (JuanSapriza) * Added soc_ctrl-reg_top warning to waiver (esl-epfl/x-heep#326) (JuanSapriza) * fix several applications (esl-epfl/x-heep#325) (Davide Schiavone) * Tries to use cmake3. If that is not available, go ahead with cmake (esl-epfl/x-heep#323) (JuanSapriza) * Improve the timing of cv32e40x by removing the debug triggers (esl- epfl/x-heep#324) (David Mallasén Quintana) * refactoring of examples (esl-epfl/x-heep#322) (JuanSapriza) * expose internal master ports to external devices (esl- epfl/x-heep#268) (Michele Caon) Signed-off-by: Juan Sapriza <juan.sapriza@epfl.ch>