Skip to content
Back to pull request #6765

[Calyx] Switch sequential memories to be true single port memories #23845

Sign in to view logs

[Calyx] Switch sequential memories to be true single port memories

[Calyx] Switch sequential memories to be true single port memories #23845

Run time

Learn about OS pricing on GitHub Actions
Job Run time
Sanity Check
39s
Build and Test (clang, clang++, debug, ON, ON)
7m 17s
Build and Test (gcc, g++, release, OFF, OFF)
7m 29s
15m 25s