[MooreToCore] Support string constants

[fabianschuiki]

Add a conversion for the moore.string_constant op to MooreToCore: https://chipsalliance.github.io/sv-tests-results/?v=circt_verilog+11.10+string_bit_array

[jpinot]

Hey @fabianschuiki, I'd like to give it a shot! Could you assign me?

[fabianschuiki]

Sure thing! Thanks a lot for taking a stab at this 😃. Let me know if you run into any trouble.

[jpinot]

Hi @fabianschuiki! Sorry for the delayed response—it took me a bit to dive into the CIRCT fundamentals to get oriented 😺. To tackle this, I referenced the Moore test results and tried converting moore::StringConstantOp to hw::ConstantOp by translating StringRef into a bit vector, also I tryed using hw::ArrayCreateOp. Here’s the resulting LLHD:

$ ./bin/circt-verilog string_bit_array.sv
module {
  hw.module @top() {
    %0 = llhd.constant_time <0ns, 0d, 1e>
    %c0_i80 = hw.constant 0 : i80
    %c1415934836_i32 = hw.constant 1415934836 : i32
    %c0_i112 = hw.constant 0 : i112
    %a = llhd.sig %c0_i112 : i112
    llhd.process {
      %1 = comb.concat %c0_i80, %c1415934836_i32 : i80, i32
      llhd.drv %a, %1 after %0 : !hw.inout<i112>
      llhd.halt
    }
    hw.output
  }
}

It seems that this module should work as expected since it represents a constant string, which shouldn’t be modified. Still, I’d really appreciate your thoughts on (a) what the expected correct output should look like to confirm I’m on track, and (b) whether there might be a cleaner way to handle the StringRef to bit vector conversion. So far, I’ve only managed to iterate through the string and concatenate the bytes, but I’d love to know if there’s a more elegant approach.

Thanks so much for your help guidance!

[fabianschuiki]

Hey @jpinot, this looks really nice! I think your approach of converting the characters in the string into a large hw.constant is great!

[jpinot]

Hey @fabianschuiki, once again thanks for your support 🥳 . Should this issue be close?

[fabianschuiki]

Yeah sounds great! Thanks for landing that PR 😃