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[AMDGPU][true16] [MC] Remove duplication in VOP1 test #119905

Merged
merged 3 commits into from
Dec 13, 2024
Merged

[AMDGPU][true16] [MC] Remove duplication in VOP1 test #119905

merged 3 commits into from
Dec 13, 2024

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broxigarchen
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This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop1 test file with the latest update_mc_test_script.py --unique option

This is also preparing for the up-coming true16 change

@broxigarchen broxigarchen marked this pull request as ready for review December 13, 2024 17:23
@llvmbot llvmbot added backend:AMDGPU mc Machine (object) code labels Dec 13, 2024
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llvmbot commented Dec 13, 2024 •
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@llvm/pr-subscribers-backend-amdgpu

@llvm/pr-subscribers-mc

Author: Brox Chen (broxigarchen)

Changes

This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop1 test file with the latest update_mc_test_script.py --unique option

This is also preparing for the up-coming true16 change

Full diff: https://github.com/llvm/llvm-project/pull/119905.diff

12 Files Affected:

  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1.s (+1-7)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s (+1-67)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s (+1-1)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s (+1-1)
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
index d998f4388f1f51..4e4dc6647daebd 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
@@ -500,12 +500,6 @@ v_cvt_f16_i16 v5.l, 0.5
 v_cvt_f16_i16 v5.h, src_scc
 // GFX11: v_cvt_f16_i16_e32 v5.h, src_scc         ; encoding: [0xfd,0xa2,0x0a,0x7f]
 
-v_cvt_f16_i16 v5.l, 0.5
-// GFX11: v_cvt_f16_i16_e32 v5.l, 0.5             ; encoding: [0xf0,0xa2,0x0a,0x7e]
-
-v_cvt_f16_i16 v5.h, src_scc
-// GFX11: v_cvt_f16_i16_e32 v5.h, src_scc         ; encoding: [0xfd,0xa2,0x0a,0x7f]
-
 v_cvt_f16_i16 v127.h, 0xfe0b
 // GFX11: v_cvt_f16_i16_e32 v127.h, 0xfe0b        ; encoding: [0xff,0xa2,0xfe,0x7f,0x0b,0xfe,0x00,0x00]
 
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
index bcbac043649c44..98e4b29b25666e 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
index 872a0e2ff25e79..ab4606af2bb35c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
index b3735429e9fed7..f38ff6a2fdd7d3 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
 
 v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
index 495720ef165177..95407886ccba15 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
 v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
index da241cce0c0d9c..3850f0254a7f1a 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
 
 v_bfrev_b32_e64 v5, v1
@@ -499,15 +499,6 @@ v_cvt_f16_i16_e64 v5.l, v255.h
 v_cvt_f16_i16_e64 v255.h, 0xfe0b clamp div:2
 // GFX11: v_cvt_f16_i16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd1,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]
 
-v_cvt_f16_i16_e64 v5.h, v1.h
-// GFX11: v_cvt_f16_i16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd1,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_f16_i16_e64 v5.l, v255.h
-// GFX11: v_cvt_f16_i16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd1,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_f16_i16_e64 v255.h, 0xfe0b clamp div:2
-// GFX11: v_cvt_f16_i16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd1,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]
-
 v_cvt_f16_u16_e64 v5.l, v1.l
 // GFX11: v_cvt_f16_u16_e64 v5.l, v1.l            ; encoding: [0x05,0x00,0xd0,0xd5,0x01,0x01,0x00,0x00]
 
@@ -559,18 +550,6 @@ v_cvt_f16_u16_e64 v5.h, v1.h
 v_cvt_f16_u16_e64 v5.l, v255.h
 // GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]
 
-v_cvt_f16_u16_e64 v5.h, v1.h
-// GFX11: v_cvt_f16_u16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd0,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_f16_u16_e64 v5.l, v255.h
-// GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_f16_u16_e64 v5.h, v1.h
-// GFX11: v_cvt_f16_u16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd0,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_f16_u16_e64 v5.l, v255.h
-// GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]
-
 v_cvt_f16_u16_e64 v255.h, 0xfe0b clamp div:2
 // GFX11: v_cvt_f16_u16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd0,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]
 
@@ -1207,15 +1186,6 @@ v_cvt_i16_f16_e64 v5.l, v255.h
 v_cvt_i16_f16_e64 v255.h, -|0xfe0b| clamp
 // GFX11: v_cvt_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
 
-v_cvt_i16_f16_e64 v5.h, v1.h
-// GFX11: v_cvt_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd3,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_i16_f16_e64 v5.l, v255.h
-// GFX11: v_cvt_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd3,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_i16_f16_e64 v255.h, -|0xfe0b| clamp
-// GFX11: v_cvt_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
-
 v_cvt_i32_f32_e64 v5, v1
 // GFX11: v_cvt_i32_f32_e64 v5, v1                ; encoding: [0x05,0x00,0x88,0xd5,0x01,0x01,0x00,0x00]
 
@@ -1441,15 +1411,6 @@ v_cvt_norm_i16_f16_e64 v5.l, v255.h
 v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b|
 // GFX11: v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
 
-v_cvt_norm_i16_f16_e64 v5.h, v1.h
-// GFX11: v_cvt_norm_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xe3,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_norm_i16_f16_e64 v5.l, v255.h
-// GFX11: v_cvt_norm_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xe3,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b|
-// GFX11: v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
-
 v_cvt_norm_u16_f16_e64 v5.l, v1.l
 // GFX11: v_cvt_norm_u16_f16_e64 v5.l, v1.l       ; encoding: [0x05,0x00,0xe4,0xd5,0x01,0x01,0x00,0x00]
 
@@ -1504,15 +1465,6 @@ v_cvt_norm_u16_f16_e64 v5.l, v255.h
 v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b|
 // GFX11: v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe4,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
 
-v_cvt_norm_u16_f16_e64 v5.h, v1.h
-// GFX11: v_cvt_norm_u16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xe4,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_norm_u16_f16_e64 v5.l, v255.h
-// GFX11: v_cvt_norm_u16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xe4,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b|
-// GFX11: v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe4,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
-
 v_cvt_off_f32_i4_e64 v5, v1
 // GFX11: v_cvt_off_f32_i4_e64 v5, v1             ; encoding: [0x05,0x00,0x8e,0xd5,0x01,0x01,0x00,0x00]
 
@@ -1657,15 +1609,6 @@ v_cvt_u16_f16_e64 v5.l, v255.h
 v_cvt_u16_f16_e64 v255.h, -|0xfe0b| clamp
 // GFX11: v_cvt_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd2,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
 
-v_cvt_u16_f16_e64 v5.h, v1.h
-// GFX11: v_cvt_u16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd2,0xd5,0x01,0x01,0x00,0x00]
-
-v_cvt_u16_f16_e64 v5.l, v255.h
-// GFX11: v_cvt_u16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd2,0xd5,0xff,0x01,0x00,0x00]
-
-v_cvt_u16_f16_e64 v255.h, -|0xfe0b| clamp
-// GFX11: v_cvt_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd2,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
-
 v_cvt_u32_f32_e64 v5, v1
 // GFX11: v_cvt_u32_f32_e64 v5, v1                ; encoding: [0x05,0x00,0x87,0xd5,0x01,0x01,0x00,0x00]
 
@@ -2323,15 +2266,6 @@ v_frexp_exp_i16_f16_e64 v5.l, v255.h
 v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b|
 // GFX11: v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xda,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
 
-v_frexp_exp_i16_f16_e64 v5.h, v1.h
-// GFX11: v_frexp_exp_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xda,0xd5,0x01,0x01,0x00,0x00]
-
-v_frexp_exp_i16_f16_e64 v5.l, v255.h
-// GFX11: v_frexp_exp_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xda,0xd5,0xff,0x01,0x00,0x00]
-
-v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b|
-// GFX11: v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xda,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]
-
 v_frexp_exp_i32_f32_e64 v5, v1
 // GFX11: v_frexp_exp_i32_f32_e64 v5, v1          ; encoding: [0x05,0x00,0xbf,0xd5,0x01,0x01,0x00,0x00]
 
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
index a3a8eb139e9b51..e701d1626f388e 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding -comment-column=0 %s | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-ASM %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | grep -oE '\[0x[0-9a-fx,]+\]' | llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -disassemble -show-encoding -comment-column=0 | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-DIS %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding -comment-column=0 %s | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-ASM %s
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
index 70ed7c6159ea81..56b42f19db38ab 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
 
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
index c4d7c6c96b9f87..09f3069114d4a7 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
 
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
index eeee3d8f8f9a1c..015619d31504b5 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s
 
 v_bfrev_b32_e64 v5, v1
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
index 05d821f9c5925e..160bc3fc6afc7c 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s
 
 v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
index 014c18a7b18e9d..c9ea7cdf1512ed 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s
 
 v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]

Sisyph
Sisyph approved these changes Dec 13, 2024
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LGTM

@broxigarchen broxigarchen merged commit 2daadbd into llvm:main Dec 13, 2024
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