Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[AMDGPU][true16] [MC] Remove duplication in VOP1 test #119905

Merged
merged 3 commits into from
Dec 13, 2024
Merged

[AMDGPU][true16] [MC] Remove duplication in VOP1 test #119905

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
08a245a
VOP1 test update with latest script
broxigarchen Dec 12, 2024
6fe8aab
Merge branch 'main' of https://github.com/llvm/llvm-project into vop1…
broxigarchen Dec 13, 2024
66bb868
remove duplicated testline from VOP1
broxigarchen Dec 13, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 1 addition & 7 deletions llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s

Expand Down Expand Up @@ -500,12 +500,6 @@ v_cvt_f16_i16 v5.l, 0.5
v_cvt_f16_i16 v5.h, src_scc
// GFX11: v_cvt_f16_i16_e32 v5.h, src_scc ; encoding: [0xfd,0xa2,0x0a,0x7f]

v_cvt_f16_i16 v5.l, 0.5
// GFX11: v_cvt_f16_i16_e32 v5.l, 0.5 ; encoding: [0xf0,0xa2,0x0a,0x7e]

v_cvt_f16_i16 v5.h, src_scc
// GFX11: v_cvt_f16_i16_e32 v5.h, src_scc ; encoding: [0xfd,0xa2,0x0a,0x7f]

v_cvt_f16_i16 v127.h, 0xfe0b
// GFX11: v_cvt_f16_i16_e32 v127.h, 0xfe0b ; encoding: [0xff,0xa2,0xfe,0x7f,0x0b,0xfe,0x00,0x00]

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s

v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s

v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
Expand Down
68 changes: 1 addition & 67 deletions llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 %s

v_bfrev_b32_e64 v5, v1
Expand Down Expand Up @@ -499,15 +499,6 @@ v_cvt_f16_i16_e64 v5.l, v255.h
v_cvt_f16_i16_e64 v255.h, 0xfe0b clamp div:2
// GFX11: v_cvt_f16_i16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd1,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]

v_cvt_f16_i16_e64 v5.h, v1.h
// GFX11: v_cvt_f16_i16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd1,0xd5,0x01,0x01,0x00,0x00]

v_cvt_f16_i16_e64 v5.l, v255.h
// GFX11: v_cvt_f16_i16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd1,0xd5,0xff,0x01,0x00,0x00]

v_cvt_f16_i16_e64 v255.h, 0xfe0b clamp div:2
// GFX11: v_cvt_f16_i16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd1,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]

v_cvt_f16_u16_e64 v5.l, v1.l
// GFX11: v_cvt_f16_u16_e64 v5.l, v1.l ; encoding: [0x05,0x00,0xd0,0xd5,0x01,0x01,0x00,0x00]

Expand Down Expand Up @@ -559,18 +550,6 @@ v_cvt_f16_u16_e64 v5.h, v1.h
v_cvt_f16_u16_e64 v5.l, v255.h
// GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]

v_cvt_f16_u16_e64 v5.h, v1.h
// GFX11: v_cvt_f16_u16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd0,0xd5,0x01,0x01,0x00,0x00]

v_cvt_f16_u16_e64 v5.l, v255.h
// GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]

v_cvt_f16_u16_e64 v5.h, v1.h
// GFX11: v_cvt_f16_u16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd0,0xd5,0x01,0x01,0x00,0x00]

v_cvt_f16_u16_e64 v5.l, v255.h
// GFX11: v_cvt_f16_u16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd0,0xd5,0xff,0x01,0x00,0x00]

v_cvt_f16_u16_e64 v255.h, 0xfe0b clamp div:2
// GFX11: v_cvt_f16_u16_e64 v255.h, 0xfe0b op_sel:[0,1] clamp div:2 ; encoding: [0xff,0xc0,0xd0,0xd5,0xff,0x00,0x00,0x18,0x0b,0xfe,0x00,0x00]

Expand Down Expand Up @@ -1207,15 +1186,6 @@ v_cvt_i16_f16_e64 v5.l, v255.h
v_cvt_i16_f16_e64 v255.h, -|0xfe0b| clamp
// GFX11: v_cvt_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_i16_f16_e64 v5.h, v1.h
// GFX11: v_cvt_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd3,0xd5,0x01,0x01,0x00,0x00]

v_cvt_i16_f16_e64 v5.l, v255.h
// GFX11: v_cvt_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd3,0xd5,0xff,0x01,0x00,0x00]

v_cvt_i16_f16_e64 v255.h, -|0xfe0b| clamp
// GFX11: v_cvt_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_i32_f32_e64 v5, v1
// GFX11: v_cvt_i32_f32_e64 v5, v1 ; encoding: [0x05,0x00,0x88,0xd5,0x01,0x01,0x00,0x00]

Expand Down Expand Up @@ -1441,15 +1411,6 @@ v_cvt_norm_i16_f16_e64 v5.l, v255.h
v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_norm_i16_f16_e64 v5.h, v1.h
// GFX11: v_cvt_norm_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xe3,0xd5,0x01,0x01,0x00,0x00]

v_cvt_norm_i16_f16_e64 v5.l, v255.h
// GFX11: v_cvt_norm_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xe3,0xd5,0xff,0x01,0x00,0x00]

v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_cvt_norm_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe3,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_norm_u16_f16_e64 v5.l, v1.l
// GFX11: v_cvt_norm_u16_f16_e64 v5.l, v1.l ; encoding: [0x05,0x00,0xe4,0xd5,0x01,0x01,0x00,0x00]

Expand Down Expand Up @@ -1504,15 +1465,6 @@ v_cvt_norm_u16_f16_e64 v5.l, v255.h
v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe4,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_norm_u16_f16_e64 v5.h, v1.h
// GFX11: v_cvt_norm_u16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xe4,0xd5,0x01,0x01,0x00,0x00]

v_cvt_norm_u16_f16_e64 v5.l, v255.h
// GFX11: v_cvt_norm_u16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xe4,0xd5,0xff,0x01,0x00,0x00]

v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_cvt_norm_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xe4,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_off_f32_i4_e64 v5, v1
// GFX11: v_cvt_off_f32_i4_e64 v5, v1 ; encoding: [0x05,0x00,0x8e,0xd5,0x01,0x01,0x00,0x00]

Expand Down Expand Up @@ -1657,15 +1609,6 @@ v_cvt_u16_f16_e64 v5.l, v255.h
v_cvt_u16_f16_e64 v255.h, -|0xfe0b| clamp
// GFX11: v_cvt_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd2,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_u16_f16_e64 v5.h, v1.h
// GFX11: v_cvt_u16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xd2,0xd5,0x01,0x01,0x00,0x00]

v_cvt_u16_f16_e64 v5.l, v255.h
// GFX11: v_cvt_u16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xd2,0xd5,0xff,0x01,0x00,0x00]

v_cvt_u16_f16_e64 v255.h, -|0xfe0b| clamp
// GFX11: v_cvt_u16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] clamp ; encoding: [0xff,0xc1,0xd2,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_cvt_u32_f32_e64 v5, v1
// GFX11: v_cvt_u32_f32_e64 v5, v1 ; encoding: [0x05,0x00,0x87,0xd5,0x01,0x01,0x00,0x00]

Expand Down Expand Up @@ -2323,15 +2266,6 @@ v_frexp_exp_i16_f16_e64 v5.l, v255.h
v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xda,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_frexp_exp_i16_f16_e64 v5.h, v1.h
// GFX11: v_frexp_exp_i16_f16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0xda,0xd5,0x01,0x01,0x00,0x00]

v_frexp_exp_i16_f16_e64 v5.l, v255.h
// GFX11: v_frexp_exp_i16_f16_e64 v5.l, v255.h op_sel:[1,0] ; encoding: [0x05,0x08,0xda,0xd5,0xff,0x01,0x00,0x00]

v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b|
// GFX11: v_frexp_exp_i16_f16_e64 v255.h, -|0xfe0b| op_sel:[0,1] ; encoding: [0xff,0x41,0xda,0xd5,0xff,0x00,0x00,0x20,0x0b,0xfe,0x00,0x00]

v_frexp_exp_i32_f32_e64 v5, v1
// GFX11: v_frexp_exp_i32_f32_e64 v5, v1 ; encoding: [0x05,0x00,0xbf,0xd5,0x01,0x01,0x00,0x00]

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding -comment-column=0 %s | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-ASM %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | grep -oE '\[0x[0-9a-fx,]+\]' | llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -disassemble -show-encoding -comment-column=0 | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-DIS %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding -comment-column=0 %s | FileCheck --strict-whitespace --check-prefixes=GFX12,GFX12-ASM %s
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX12 %s

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s

v_bfrev_b32_e64 v5, v1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s

v_bfrev_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX12 %s

v_bfrev_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
Expand Down
Loading