Adding back the HWLoop

Bender.yml

@@ -3,6 +3,7 @@ package:
 
 dependencies:
   fpnew: { git: "https://github.com/pulp-platform/fpnew.git", version: 0.6.1 }
+  common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.16.4 }
   tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.1.1 }
 
 sources:
@@ -14,6 +15,7 @@ sources:
     - rtl/cv32e40p_register_file_test_wrap.sv
     - rtl/cv32e40p_alu.sv
     - rtl/cv32e40p_alu_div.sv
+    - rtl/cv32e40p_aligner.sv
     - rtl/cv32e40p_compressed_decoder.sv
     - rtl/cv32e40p_controller.sv
     - rtl/cv32e40p_cs_registers.sv
@@ -28,7 +30,6 @@ sources:
     - rtl/cv32e40p_mult.sv
     - rtl/cv32e40p_prefetch_buffer.sv
     - rtl/cv32e40p_obi_interface.sv
-    - rtl/cv32e40p_prefetch_controller.sv
     - rtl/cv32e40p_core.sv
     - rtl/cv32e40p_apu_disp.sv
     - rtl/cv32e40p_fetch_fifo.sv

bhv/cv32e40p_wrapper.sv

@@ -141,7 +141,7 @@ module cv32e40p_wrapper import cv32e40p_apu_core_pkg::*;
       .imm_vs_type    ( id_stage_i.imm_vs_type               ),
       .imm_vu_type    ( id_stage_i.imm_vu_type               ),
       .imm_shuffle_type ( id_stage_i.imm_shuffle_type        ),
-      .imm_clip_type  ( id_stage_i.instr_rdata_i[11:7]       )
+      .imm_clip_type  ( id_stage_i.instr[11:7]       )
     );
 
 `endif

cv32e40p_manifest.flist

@@ -36,12 +36,12 @@ ${DESIGN_RTL_DIR}/cv32e40p_cs_registers.sv
 ${DESIGN_RTL_DIR}/cv32e40p_register_file_ff.sv
 ${DESIGN_RTL_DIR}/cv32e40p_load_store_unit.sv
 ${DESIGN_RTL_DIR}/cv32e40p_id_stage.sv
+${DESIGN_RTL_DIR}/cv32e40p_aligner.sv
 ${DESIGN_RTL_DIR}/cv32e40p_decoder.sv
 ${DESIGN_RTL_DIR}/cv32e40p_compressed_decoder.sv
-${DESIGN_RTL_DIR}/cv32e40p_fetch_fifo.sv
+${DESIGN_RTL_DIR}/cv32e40p_fifo.sv
 ${DESIGN_RTL_DIR}/cv32e40p_prefetch_buffer.sv
 ${DESIGN_RTL_DIR}/cv32e40p_hwloop_regs.sv
-${DESIGN_RTL_DIR}/cv32e40p_hwloop_controller.sv
 ${DESIGN_RTL_DIR}/cv32e40p_mult.sv
 ${DESIGN_RTL_DIR}/cv32e40p_register_file_test_wrap.sv
 ${DESIGN_RTL_DIR}/cv32e40p_int_controller.sv

example_tb/core/Makefile

@@ -75,7 +75,6 @@ RISCV_EXE_PREFIX         = $(RISCV)/bin/riscv32-unknown-elf-
 
 # GCC configuration
 CUSTOM_GCC_FLAGS           =
-INTERRUPT_GCC_FLAGS        =
 
 all: custom-vsim-run
 
@@ -229,7 +228,7 @@ custom-fp-vsim-run-gui: vsim-run-gui-fp
 # compile and run interrupt
 interrupt/interrupt.elf: interrupt/interrupt.c
 	$(RISCV_EXE_PREFIX)gcc -march=rv32imc -o $@ -w -Os -g -nostdlib \
-		${INTERRUPT_GCC_FLAGS} \
+		${CUSTOM_GCC_FLAGS} \
 		-T custom/link.ld  \
 		-static \
 		custom/crt0.S \
@@ -252,6 +251,34 @@ interrupt-vsim-run-gui: vsim-all interrupt/interrupt.hex
 interrupt-vsim-run-gui: ALL_VSIM_FLAGS += "+firmware=interrupt/interrupt.hex"
 interrupt-vsim-run-gui: vsim-run-gui
 
+# Compile and run HW-loops test
+# Until the compiler will correctly handle HW-loops, manually insert them (no jumps/branch in the body)
+# Compile with "rv32imxpulpv2" with "-mnohwloop" or "-O0" to avoid the compiler inserting other hw-loops
+# Do not use RVC, as the instructions should be aligned and not compressed
+hwlp_test/hwlp_test.elf: hwlp_test/hwlp_test.c
+	$(RISCV_EXE_PREFIX)gcc -march=rv32imxpulpv2 -mnohwloop -o $@ -w -O0 -g -nostdlib \
+		$(CUSTOM_GCC_FLAGS) \
+		-T custom/link.ld \
+		-static \
+		custom/crt0.S \
+		$^ mem_stall/mem_stall.c custom/syscalls.c custom/vectors.S \
+		-I $(RISCV)/riscv32-unknown-elf/include \
+		-I mem_stall \
+		-L $(RISCV)/riscv32-unknown-elf/lib \
+		-lc -lm -lgcc
+hwlp-clean:
+	rm -rf hwlp_test/hwlp_test.elf hwlp_test/hwlp_test.hex
+
+.PHONY: hwlp-vsim-run
+hwlp-vsim-run: vsim-all hwlp_test/hwlp_test.hex
+hwlp-vsim-run: ALL_VSIM_FLAGS += "+firmware=hwlp_test/hwlp_test.hex"
+hwlp-vsim-run: vsim-run
+
+.PHONY: hwlp-vsim-run-gui
+hwlp-vsim-run-gui: vsim-all hwlp_test/hwlp_test.hex
+hwlp-vsim-run-gui: ALL_VSIM_FLAGS += "+firmware=hwlp_test/hwlp_test.hex"
+hwlp-vsim-run-gui: vsim-run-gui
+
 # general targets
 .PHONY: clean
-clean: tb-clean tb-clean-fp custom-clean custom-fp-clean interrupt-clean
+clean: tb-clean tb-clean-fp custom-clean custom-fp-clean interrupt-clean hwlp-clean

example_tb/core/custom/hello_world.c

@@ -1,5 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
+
 #include "mem_stall.h"
 
 int main(int argc, char *argv[])

example_tb/core/cv32e40p_random_interrupt_generator.sv

@@ -149,14 +149,24 @@ begin
     max_irq_cycles = irq_max_cycles_i;
 
     // generate random word and mask it with lower/upper bounds
-    temp = value.randomize();
-    for(int i = min_irq_id-1; i >= 0; i--) begin
-      value.rand_word[i] = 0;
-    end
-
-    for(int i = max_irq_id+1; i <= 31; i++) begin
-      value.rand_word[i] = 0;
-    end
+    do begin
+      temp = value.randomize();
+
+      // These lines are not used by the processor
+      value.rand_word[2:0]   = '0;
+      value.rand_word[6:4]   = '0;
+      value.rand_word[10:8]  = '0;
+      value.rand_word[15:12] = '0;
+
+      for(int i = min_irq_id-1; i >= 0; i--) begin
+        value.rand_word[i] = 0;
+      end
+
+      for(int i = max_irq_id+1; i <= 31; i++) begin
+        value.rand_word[i] = 0;
+      end
+    // Randomize again if value.rand_word == '0, because irq_line should be one-hot
+    end while (!(|value.rand_word));
 
     temp = wait_cycles.randomize() with{
         n >= min_irq_cycles;

example_tb/core/cv32e40p_random_stall.sv

@@ -85,10 +85,10 @@ class rand_data_cycles;
      rand int n;
 endclass : rand_data_cycles
 
-mailbox #(stall_mem_t) core_reqs          = new (4);
-mailbox #(stall_mem_t) core_resps         = new (4);
-mailbox #(logic)       core_resps_granted = new (4);
-mailbox #(stall_mem_t) memory_transfers   = new (4);
+mailbox #(stall_mem_t) core_reqs          = new ();
+mailbox #(stall_mem_t) core_resps         = new ();
+mailbox #(logic)       core_resps_granted = new ();
+mailbox #(stall_mem_t) memory_transfers   = new ();
 
  always_latch
  begin
@@ -129,8 +129,10 @@ always_latch
      #10;//wait at the very beginning
      while(1) begin
          @(posedge clk_i);
-         #1;
          grant_core_o = 1'b0;
+
+         #1;
+
          if (!req_per_q) begin
             wait(req_per_q == 1'b1);
          end
@@ -178,10 +180,10 @@ always_latch
 
      while(1) begin
          @(posedge clk_i);
-         #1;
          rvalid_core_o = 1'b0;
          rdata_core_o  = 'x;
 
+         #1;
          core_resps_granted.get(granted);
 
          core_resps.get(mem_acc);