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testbench: Add capabilities to add non-idealities to the simulation memory #8
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LGTM, although I suggest to externalize the axi throttling into an axi_throttle
module (or similar) to avoid code duplication.
Done. I created the |
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LGTM other than the minor thing noted, thanks for the quick fix!
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* Add a tracer for the DMA #8
* Add a tracer for the DMA #8
* Add a tracer for the DMA #8
* Add a tracer for the DMA #8
* Add a tracer for the DMA #8
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