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Derive Debug, PartialEq and Eq for more types #141

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Apr 24, 2019
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Derive Debug, PartialEq and Eq for more types #141

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1 change: 1 addition & 0 deletions src/peripheral/cpuid.rs
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Expand Up @@ -66,6 +66,7 @@ pub struct RegisterBlock {

/// Type of cache to select on CSSELR writes.
#[cfg(not(armv6m))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum CsselrCacheType {
/// Select DCache or unified cache
DataOrUnified = 0,
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2 changes: 1 addition & 1 deletion src/peripheral/scb.rs
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Expand Up @@ -97,7 +97,7 @@ pub struct RegisterBlock {

/// FPU access mode
#[cfg(has_fpu)]
#[derive(Clone, Copy, Debug)]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum FpuAccessMode {
/// FPU is not accessible
Disabled,
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2 changes: 1 addition & 1 deletion src/peripheral/syst.rs
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Expand Up @@ -18,7 +18,7 @@ pub struct RegisterBlock {
}

/// SysTick clock source
#[derive(Clone, Copy, Debug)]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum SystClkSource {
/// Core-provided clock
Core,
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