enable Atomic*.{load,store} for ARMv6-M / MSP430 #51953
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rust-highfive
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japaric
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Jun 30, 2018
src/libsyntax/feature_gate.rs
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| @@ -479,6 +479,9 @@ declare_features! ( | |||
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| // Allows async and await syntax | |||
| (active, async_await, "1.28.0", Some(50547), None), | |||
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| // Allows async and await syntax | |||
| (active, cfg_target_has_atomic_cas, "1.28.0", Some(0), None), | |||
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after this gets a thumbs up I'll create a tracking issue and fill it the number here
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Looks good to me. Unfortunately I think there is a bug in llvm that needs to be fixed to use atomics on msp430. There is a chance that libcore will fail to compile on msp with this change, need to check before committing. |
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alexcrichton
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Jul 2, 2018
src/liballoc/lib.rs
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| @@ -163,7 +164,8 @@ mod boxed { | |||
| #[cfg(test)] | |||
| mod boxed_test; | |||
| pub mod collections; | |||
| #[cfg(target_has_atomic = "ptr")] | |||
| #[cfg_attr(stage0, cfg(target_has_atomic = "ptr"))] | |||
| #[cfg_attr(not(stage0), cfg(all(target_has_atomic = "ptr", target_has_atomic_cas)))] | |||
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Instead of this cfg_attr, perhaps this could be:
#[cfg(any(
all(stage0, target_has_atomic = "ptr"),
all(not(stage0), target_has_atomic_cas, target_has_atomic = "ptr")
))]That may be a bit easier to clean up after the next stage0
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Also, in terms of implementation, it may be easiest to piggy back on the existing target_has_atomic perhaps and do something like target_has_atomic ="cas" maybe?
src/libcore/sync/atomic.rs
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| @@ -853,6 +862,7 @@ impl<T> AtomicPtr<T> { | |||
| /// ``` | |||
| #[inline] | |||
| #[stable(feature = "extended_compare_and_swap", since = "1.10.0")] | |||
| #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))] | |||
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This I think can be #[cfg(any(stage0, target_has_atomic_cas))]
closes rust-lang#45085 this commit adds an `atomic_cas` target option and an unstable `#[cfg(target_has_atomic_cas)]` attribute to enable a subset of the `Atomic*` API on architectures that don't support atomic CAS natively, like MSP430 and ARMv6-M.
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@alexcrichton latest commit reuses the existing |
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@bors: r+ |
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📌 Commit 0ed3231 has been approved by |
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@bors r- There is a failed CI test. |
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Very excited about this change! |
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@bors r=alexcrichton |
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📌 Commit f9145d0 has been approved by |
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☀️ Test successful - status-appveyor, status-travis |
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Jul 14, 2018
As of rust-lang/rust#51953 `cfg(target_has_atomic)` has been updated to separately enable compare-and-swap (CAS) operations from the different supported sizes. Because `AtomicWaker` uses these CAS operations we need to also gate its inclusion on `cfg(target_has_atomic = "cas")`. `thumv6m` is one of the architectures that supports atomic read-write operations on its pointer sized integers, but doesn't support CAS operations.
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As of rust-lang/rust#51953 `cfg(target_has_atomic)` has been updated to separately enable compare-and-swap (CAS) operations from the different supported sizes. Because `AtomicWaker` uses these CAS operations we need to also gate its inclusion on `cfg(target_has_atomic = "cas")`. `thumv6m` is one of the architectures that supports atomic read-write operations on its pointer sized integers, but doesn't support CAS operations.
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Sep 22, 2018
…richton remove (more) CAS API from Atomic* types where not natively supported closes rust-lang#54276 In PR rust-lang#51953 I made the Atomic* types available on targets like thumbv6m and msp430 with the intention of *only* exposing the load and store API on those types -- the rest of the API doesn't work on those targets because the are no native instructions to implement CAS loops. Unfortunately, it seems I didn't properly cfg away all the CAS API on those targets, as evidenced in rust-lang#54276. This PR amends the issue by removing the rest of the CAS API. This is technically a breaking change because *libraries* that were using this API and were being compiled for e.g. thumbv6m-none-eabi will stop compiling. However, using those libraries (before this change) in programs (binaries) would lead to linking errors when compiled for e.g. thumbv6m so this change effectively shifts a linker error in binaries to a compiler error in libraries. On a side note: extending the Atomic API is a bit error prone because of these non-cas targets. Unless the author of the change is aware of these targets and properly uses `#[cfg(atomic = "cas")]` they could end up exposing new CAS API on these targets. I can't think of a test to check that an API is not present on some target, but we could extend the `tidy` tool to check that *all* newly added atomic API has the `#[cfg(atomic = "cas")]` attribute unless it's whitelisted in `tidy` then the author of the change would have to verify if the API can be used on non-cas targets. In any case, I'd like to plug this hole ASAP. We can revisit testing in a follow-up issue / PR. r? @alexcrichton cc @mvirkkunen
japaric
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Oct 28, 2018
PR rust-lang#51953 enabled the Atomic*.{load,store} API on MSP430. Unfortunately, the LLVM backend doesn't currently support those atomic operations, so this commit removes the API and leaves instructions on how and when to enable it in the future.
kennytm
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Oct 30, 2018
msp430: remove the whole Atomic* API PR rust-lang#51953 enabled the Atomic*.{load,store} API on MSP430. Unfortunately, the LLVM backend doesn't currently support those atomic operations, so this commit removes the API and leaves instructions on how and when to enable it in the future. the second fixes compiling liballoc for msp430 closes rust-lang#54511 r? @alexcrichton cc @chernomor @awygle @cr1901 @pftbest
bradjc
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Nov 26, 2018
Since rust-lang/rust#51953 was merged, there is now support for atomic load and store with cortex-m0 in rust by default.
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Nov 30, 2018
Since rust-lang/rust#51953 was merged, there is now support for atomic load and store with cortex-m0 in rust by default.
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This reverts commit 7f20daa. There are RISC-V platforms that don't support atomics (such as OpenTitan) so let's revert this commit until RV32 has atomic load and store support when the Atomic (A) extension isn't supported. That is wait until something like this for RISC-V is merged: rust-lang/rust#51953 Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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698: Remove uses of unstable feature(cfg_target_has_atomic) r=taiki-e a=taiki-e Some no-std targets (e.g., ARMv6-M) do not support atomic CAS operations and cannot use Arc, etc. Currently, we are using an unstable feature to detect them, but it has caused breakage in the past (#435). Also, users of stable Rust are not able to compile crossbeam on those targets. Instead of depending on unstable features of the compiler, this patch detects those targets using the TARGET environment variables provided by cargo for the build script, and a list of targets that do not support atomic CAS operations. This way is the same as the way we recently adopted in [futures](rust-lang/futures-rs#2400) and [valuable](tokio-rs/valuable#12), and was originally inspired by the way [heapless](rust-embedded/heapless@44c66a7) and [defmt](https://github.com/knurling-rs/defmt/blob/963152f0fc530fca64ba4ff1492d9c4b7bf76062/build.rs#L42-L51) do, but this doesn't maintain the target list manually. (It's not really fully automated, but [it's very easy to update](https://github.com/crossbeam-rs/crossbeam/blob/a42dbed87a5739228b576f526b1e2fd80260a29b/.github/workflows/ci.yml#L89).) Also, this completely removes the dependency on unstable features from crates other than crossbeam-epoch. refs: rust-lang/rust#51953, rust-lang/futures-rs#2400, tokio-rs/valuable#12 704: Add AtomicCell::fetch_update r=taiki-e a=taiki-e Equivalent of [`std::sync::atomic::AtomicN::fetch_update`](https://doc.rust-lang.org/nightly/core/sync/atomic/struct.AtomicUsize.html#method.fetch_update) that stabilized in Rust 1.45. Co-authored-by: Taiki Endo <te316e89@gmail.com>
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closes #45085
as proposed in #45085 (comment)
this commit adds an
atomic_castarget option and extends the#[cfg(target_has_atomic)]attribute to enable a subset of the
Atomic*API on architectures that don't support atomic CASnatively, like MSP430 and ARMv6-M.
r? @alexcrichton