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Add belgite support #9511

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merged 21 commits into from
May 24, 2022
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461d546
add belgite platform support
nicwu-cel Nov 16, 2021
e423015
update the cel rules
jerseyang Nov 17, 2021
a1c7da5
[Author] jersey yang [Jira ID]: NA [Description]: fix the compiling e…
jerseyang Nov 22, 2021
079133f
Merge branch 'master' into Add_Belgite_support
jerseyang Nov 24, 2021
ac3a2fe
fix the pddf_custom_psu module compiling issue
AntheaJiang Dec 11, 2021
a188cc0
Merge branch 'master' into Add_Belgite_support
AntheaJiang Dec 12, 2021
7a21eca
Merge branch 'master' into Add_Belgite_support
AntheaJiang Jan 24, 2022
7c3a57d
[Author]:jersyang@celestica.com [Description]:support PDDF customized…
nicwu-cel Feb 16, 2022
a20602a
[Author]:jersyang@celestica.com [JIRA ID]:NA [Description]:1. change …
nicwu-cel Feb 18, 2022
9da2b1b
[Author]:jersyang@celestica.com [Jira ID]:NA [Description]:fix the PD…
nicwu-cel Feb 28, 2022
77bfe8c
correct the config.bcm or else SAI can not run well
sandylicls Mar 25, 2022
138ba89
[Author]:jersyang@celestica.com [Jira ID]:N/A [Description]:fix the w…
nicwu-cel Apr 11, 2022
38fce5f
[Author]:jersyang@celestica.com [Jira ID]:N/A [Description]: fix fan …
nicwu-cel Apr 11, 2022
84c953b
[Author]:jersyang@celesitca.com [Jira ID]:N/A [Description]:fix the t…
nicwu-cel Apr 12, 2022
c97ce76
[Author]:jersyang@celesitca.com [Jira ID]:N/A [Description]:fix the t…
nicwu-cel Apr 20, 2022
273d24a
Merge branch 'master' into Add_Belgite_support
nicwu-cel Apr 23, 2022
318e5ea
[Author]:jersyang@celestica.com [Jira ID]:N/A [Description]: update c…
nicwu-cel Apr 25, 2022
6f31f8b
[Author]: jersyang@celestica.com [Jira ID]:N/A fix the i2c controller…
nicwu-cel Apr 28, 2022
c5ebd2f
[Author]:jersyang@celestica.com [Jira ID]:N/A [Description]: fix the …
nicwu-cel May 9, 2022
5b3cb0b
Merge branch 'master' into Add_Belgite_support
nicwu-cel May 9, 2022
b725940
[Author]:jersyang@celestica.com [Jira ID]:N/A [Description]:fix the m…
nicwu-cel May 10, 2022
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Original file line number Diff line number Diff line change
@@ -0,0 +1,145 @@
#GPORT0
portmap_25.0=2:1
phy_port_primary_and_offset_25=0x0100
portmap_26.0=1:1
phy_port_primary_and_offset_26=0x0101
portmap_27.0=4:1
phy_port_primary_and_offset_27=0x0102
portmap_28.0=3:1
phy_port_primary_and_offset_28=0x0103
portmap_29.0=6:1
phy_port_primary_and_offset_29=0x0500
portmap_30.0=5:1
phy_port_primary_and_offset_30=0x0501
portmap_31.0=8:1
phy_port_primary_and_offset_31=0x0502
portmap_32.0=7:1
phy_port_primary_and_offset_32=0x0503

#GPORT1
portmap_33.0=10:1
phy_port_primary_and_offset_33=0x0900
portmap_34.0=9:1
phy_port_primary_and_offset_34=0x0901
portmap_35.0=12:1
phy_port_primary_and_offset_35=0x0902
portmap_36.0=11:1
phy_port_primary_and_offset_36=0x0903
portmap_37.0=14:1
phy_port_primary_and_offset_37=0x0d00
portmap_38.0=13:1
phy_port_primary_and_offset_38=0x0d01
portmap_39.0=16:1
phy_port_primary_and_offset_39=0x0d02
portmap_40.0=15:1
phy_port_primary_and_offset_40=0x0d03

#GPORT2
portmap_41.0=18:1
phy_port_primary_and_offset_41=0x1101
portmap_42.0=17:1
phy_port_primary_and_offset_42=0x1100
portmap_43.0=20:1
phy_port_primary_and_offset_43=0x1103
portmap_44.0=19:1
phy_port_primary_and_offset_44=0x1102
portmap_45.0=22:1
phy_port_primary_and_offset_45=0x1501
portmap_46.0=21:1
phy_port_primary_and_offset_46=0x1500
portmap_47.0=24:1
phy_port_primary_and_offset_47=0x1503
portmap_48.0=23:1
phy_port_primary_and_offset_48=0x1502

#PM4x10Q0
portmap_1.0=26:1
portmap_2.0=25:1
portmap_3.0=28:1
portmap_4.0=27:1
portmap_5.0=30:1
portmap_6.0=29:1
portmap_7.0=32:1
portmap_8.0=31:1
phy_port_primary_and_offset_2=0x1900
phy_port_primary_and_offset_1=0x1901
phy_port_primary_and_offset_4=0x1902
phy_port_primary_and_offset_3=0x1903
phy_port_primary_and_offset_6=0x1904
phy_port_primary_and_offset_5=0x1905
phy_port_primary_and_offset_8=0x1906
phy_port_primary_and_offset_7=0x1907
port_phy_addr_2=0x01
port_phy_addr_1=0x02
port_phy_addr_4=0x03
port_phy_addr_3=0x04
port_phy_addr_6=0x05
port_phy_addr_5=0x06
port_phy_addr_8=0x07
port_phy_addr_7=0x08

portmap_9.0=34:1
portmap_10.0=33:1
portmap_11.0=36:1
portmap_12.0=35:1
portmap_13.0=38:1
portmap_14.0=37:1
portmap_15.0=40:1
portmap_16.0=39:1

phy_port_primary_and_offset_10=0x2100
phy_port_primary_and_offset_9=0x2101
phy_port_primary_and_offset_12=0x2102
phy_port_primary_and_offset_11=0x2103
phy_port_primary_and_offset_14=0x2104
phy_port_primary_and_offset_13=0x2105
phy_port_primary_and_offset_16=0x2106
phy_port_primary_and_offset_15=0x2107
port_phy_addr_10=0x2a
port_phy_addr_9=0x2b
port_phy_addr_12=0x2c
port_phy_addr_11=0x2d
port_phy_addr_14=0x2e
port_phy_addr_13=0x2f
port_phy_addr_16=0x30
port_phy_addr_15=0x31

#PM4x10Q1
portmap_17.0=42:1
portmap_18.0=41:1
portmap_19.0=44:1
portmap_20.0=43:1
portmap_21.0=50:1
portmap_22.0=49:1
portmap_23.0=52:1
portmap_24.0=51:1

phy_port_primary_and_offset_18=0x2900
phy_port_primary_and_offset_17=0x2901
phy_port_primary_and_offset_20=0x2902
phy_port_primary_and_offset_19=0x2903
phy_port_primary_and_offset_22=0x2904
phy_port_primary_and_offset_21=0x2905
phy_port_primary_and_offset_24=0x2906
phy_port_primary_and_offset_23=0x2907
port_phy_addr_18=0x53
port_phy_addr_17=0x54
port_phy_addr_20=0x55
port_phy_addr_19=0x56
port_phy_addr_22=0x57
port_phy_addr_21=0x58
port_phy_addr_24=0x59
port_phy_addr_23=0x5a

#PM4x25
portmap_49.0=60:10
portmap_50.0=58:10
portmap_51.0=59:10
portmap_52.0=57:10

##PM4x10HG
portmap_53.0=62:10
portmap_54.0=64:10
portmap_55.0=61:10
portmap_56.0=63:10

Original file line number Diff line number Diff line change
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# name lanes alias index speed autoneg
Ethernet0 26 Ethernet1/0/1 1 1000 1
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@Blueve Blueve Dec 21, 2021

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We usually use etp1 to etpN for alias

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Sorry for the late reply, Blueve. Got it, I will check it will SDK guy and update it later.

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Blueve,
We did the change as you said .

  1. Change the alias to etp1 to etpN
  2. Change the AN from 1/0 to on/off
    Here is the log. Please review. I'll update later. Thanks.
    show-interface.log

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@Blueve Blueve Dec 21, 2021

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use on or off in autoneg column?

Ethernet1 25 Ethernet1/0/2 2 1000 1
Ethernet2 28 Ethernet1/0/3 3 1000 1
Ethernet3 27 Ethernet1/0/4 4 1000 1
Ethernet4 30 Ethernet1/0/5 5 1000 1
Ethernet5 29 Ethernet1/0/6 6 1000 1
Ethernet6 32 Ethernet1/0/7 7 1000 1
Ethernet7 31 Ethernet1/0/8 8 1000 1
Ethernet8 34 Ethernet1/0/9 9 1000 1
Ethernet9 33 Ethernet1/0/10 10 1000 1
Ethernet10 36 Ethernet1/0/11 11 1000 1
Ethernet11 35 Ethernet1/0/12 12 1000 1
Ethernet12 38 Ethernet1/0/13 13 1000 1
Ethernet13 37 Ethernet1/0/14 14 1000 1
Ethernet14 40 Ethernet1/0/15 15 1000 1
Ethernet15 39 Ethernet1/0/16 16 1000 1
Ethernet16 42 Ethernet1/0/17 17 1000 1
Ethernet17 41 Ethernet1/0/18 18 1000 1
Ethernet18 44 Ethernet1/0/19 19 1000 1
Ethernet19 43 Ethernet1/0/20 20 1000 1
Ethernet20 50 Ethernet1/0/21 21 1000 1
Ethernet21 49 Ethernet1/0/22 22 1000 1
Ethernet22 52 Ethernet1/0/23 23 1000 1
Ethernet23 51 Ethernet1/0/24 24 1000 1
Ethernet24 2 Ethernet1/0/25 25 1000 1
Ethernet25 1 Ethernet1/0/26 26 1000 1
Ethernet26 4 Ethernet1/0/27 27 1000 1
Ethernet27 3 Ethernet1/0/28 28 1000 1
Ethernet28 6 Ethernet1/0/29 29 1000 1
Ethernet29 5 Ethernet1/0/30 30 1000 1
Ethernet30 8 Ethernet1/0/31 31 1000 1
Ethernet31 7 Ethernet1/0/32 32 1000 1
Ethernet32 10 Ethernet1/0/33 33 1000 1
Ethernet33 9 Ethernet1/0/34 34 1000 1
Ethernet34 12 Ethernet1/0/35 35 1000 1
Ethernet35 11 Ethernet1/0/36 36 1000 1
Ethernet36 14 Ethernet1/0/37 37 1000 1
Ethernet37 13 Ethernet1/0/38 38 1000 1
Ethernet38 16 Ethernet1/0/39 39 1000 1
Ethernet39 15 Ethernet1/0/40 40 1000 1
Ethernet40 18 Ethernet1/0/41 41 1000 1
Ethernet41 17 Ethernet1/0/42 42 1000 1
Ethernet42 20 Ethernet1/0/43 43 1000 1
Ethernet43 19 Ethernet1/0/44 44 1000 1
Ethernet44 22 Ethernet1/0/45 45 1000 1
Ethernet45 21 Ethernet1/0/46 46 1000 1
Ethernet46 24 Ethernet1/0/47 47 1000 1
Ethernet47 23 Ethernet1/0/48 48 1000 1
Ethernet48 60 Ethernet1/0/49 49 10000 0
Ethernet49 58 Ethernet1/0/50 50 10000 0
Ethernet50 59 Ethernet1/0/51 51 10000 0
Ethernet51 57 Ethernet1/0/52 52 10000 0
Ethernet52 62 Ethernet1/0/53 53 10000 0
Ethernet53 64 Ethernet1/0/54 54 10000 0
Ethernet54 61 Ethernet1/0/55 55 10000 0
Ethernet55 63 Ethernet1/0/56 56 10000 0
Original file line number Diff line number Diff line change
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/belgite.config.bcm
Binary file not shown.
1 change: 1 addition & 0 deletions device/celestica/x86_64-cel_belgite-r0/default_sku
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
CELESTICA-BELGITE t1
4 changes: 4 additions & 0 deletions device/celestica/x86_64-cel_belgite-r0/installer.conf
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
CONSOLE_PORT=0x3f8
CONSOLE_DEV=0
CONSOLE_SPEED=115200
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@lguohan do we need 9600 for better compatibility?

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Hi Blueve, seems our Banyan usually use the 9600 Baud Rate, also, I will update it later. Thanks Again.

ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog"
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
#
# Copyright: (c) 2012 Broadcom Corp.
# All Rights Reserved.
#

SDK = ../../../../sdk-all-6.5.16/
export SDK

ifeq (${SDK},)
# {
$(error environment variable SDK not set)
# }
endif

INCDIR = -I${SDK}/include

all:
arm-linux-gcc -O1 -g ${INCDIR} -mthumb -mcpu=cortex-m0 -c -o custom_led.o custom_led.c
arm-linux-ld -T custom_led.lds -Bstatic -nostdlib --entry 0 -EL -Map custom_led.map -o custom_led.elf custom_led.o
arm-linux-objcopy -O binary custom_led.elf custom_led.bin

clean:
rm -rf *.elf *.o *.map *.bin

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