spi: pin definitions

t-crest · Nov 12, 2024 · 1227065 · 1227065
1 parent 2d4f6b0
commit 1227065
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Showing 2 changed files with 4 additions and 5 deletions.
diff --git a/nexysA7.xdc b/nexysA7.xdc
@@ -1,4 +1,4 @@
-
+``
  ## This file is a general .xdc for the Nexys A7-100T
 ## To use it in a project:
 ## - uncomment the lines corresponding to used pins
@@ -87,10 +87,10 @@ set_property -dict { PACKAGE_PIN M18   IOSTANDARD LVCMOS33 } [get_ports { reset
 
 ##Pmod Headers
 ##Pmod Header JA
-set_property -dict { PACKAGE_PIN C17   IOSTANDARD LVCMOS33 } [get_ports { io_sck }]; #IO_L20N_T3_A19_15 Sch=ja[1]
+set_property -dict { PACKAGE_PIN C17   IOSTANDARD LVCMOS33 } [get_ports { io_ncs }]; #IO_L20N_T3_A19_15 Sch=ja[1]
 set_property -dict { PACKAGE_PIN D18   IOSTANDARD LVCMOS33 } [get_ports { io_mosi }]; #IO_L21N_T3_DQS_A18_15 Sch=ja[2]
 set_property -dict { PACKAGE_PIN E18   IOSTANDARD LVCMOS33 } [get_ports { io_miso }]; #IO_L21P_T3_DQS_15 Sch=ja[3]
-set_property -dict { PACKAGE_PIN G17   IOSTANDARD LVCMOS33 } [get_ports { io_ncs }]; #IO_L18N_T2_A23_15 Sch=ja[4]
+set_property -dict { PACKAGE_PIN G17   IOSTANDARD LVCMOS33 } [get_ports { io_sck }]; #IO_L18N_T2_A23_15 Sch=ja[4]
 #set_property -dict { PACKAGE_PIN C17   IOSTANDARD LVCMOS33 } [get_ports { JA[1] }]; #IO_L20N_T3_A19_15 Sch=ja[1]
 #set_property -dict { PACKAGE_PIN D18   IOSTANDARD LVCMOS33 } [get_ports { JA[2] }]; #IO_L21N_T3_DQS_A18_15 Sch=ja[2]
 #set_property -dict { PACKAGE_PIN E18   IOSTANDARD LVCMOS33 } [get_ports { JA[3] }]; #IO_L21P_T3_DQS_15 Sch=ja[3]

diff --git a/src/main/scala/spi/SpiMaster.scala b/src/main/scala/spi/SpiMaster.scala
@@ -21,7 +21,6 @@ class SpiMaster extends Module {
   import State._
   val state = RegInit(idle)
 
-  val (x, y) = Counter(true.B, 10)
   val mosiReg = RegInit(0.U(8.W))
   val misoReg = RegInit(0.U(8.W))
   val bitsReg = RegInit(0.U(8.W))
@@ -30,7 +29,7 @@ class SpiMaster extends Module {
 
 
   spi.ncs := 1.U
-  spi.sclk := x
+  spi.sclk := 0.U
   spi.mosi := mosiReg(7)
   io.dataOut := misoReg