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spi: refactor bit banging code Scala CI #76: Commit 04d67e9 pushed by schoeberl
November 20, 2024 00:37 1m 50s master
master
November 20, 2024 00:37 1m 50s
spi: Flash programming Scala CI #75: Commit babbad0 pushed by schoeberl
November 19, 2024 23:02 1m 39s master
master
November 19, 2024 23:02 1m 39s
spi: bit bang read ids, memory Scala CI #74: Commit d3747ad pushed by schoeberl
November 19, 2024 21:35 1m 28s master
master
November 19, 2024 21:35 1m 28s
spi: bit bang via UART in Scala Scala CI #73: Commit 2efc679 pushed by schoeberl
November 19, 2024 02:30 1m 35s master
master
November 19, 2024 02:30 1m 35s
spi: fix Java based serial IO Scala CI #72: Commit c0836fd pushed by schoeberl
November 18, 2024 07:09 1m 22s master
master
November 18, 2024 07:09 1m 22s
spi: get Python serial test working Scala CI #71: Commit aeec63f pushed by schoeberl
November 18, 2024 05:53 1m 26s master
master
November 18, 2024 05:53 1m 26s
spi: fixes with LEDs Scala CI #70: Commit 1065ba8 pushed by schoeberl
November 16, 2024 09:05 2m 1s master
master
November 16, 2024 09:05 2m 1s
rework non-working partial assignment Scala CI #69: Commit f32fa41 pushed by schoeberl
November 16, 2024 08:54 1m 29s master
master
November 16, 2024 08:54 1m 29s
spi: bit bang Scala CI #68: Commit 404f9ff pushed by schoeberl
November 16, 2024 08:44 1m 30s master
master
November 16, 2024 08:44 1m 30s
Use UartDebug in BitBang Scala CI #67: Commit bbd640f pushed by schoeberl
November 15, 2024 05:03 1m 49s master
master
November 15, 2024 05:03 1m 49s
Finish UartDebug Scala CI #66: Commit 8764e40 pushed by schoeberl
November 15, 2024 02:37 1m 30s master
master
November 15, 2024 02:37 1m 30s
Switch to UartDebug Scala CI #65: Commit be10ea3 pushed by schoeberl
November 14, 2024 22:12 1m 29s master
master
November 14, 2024 22:12 1m 29s
Start with UART debugger Scala CI #64: Commit 70d83f2 pushed by schoeberl
November 14, 2024 22:03 1m 45s master
master
November 14, 2024 22:03 1m 45s
spi: use the accelerometer for testing Scala CI #63: Commit 2746268 pushed by schoeberl
November 14, 2024 19:31 1m 37s master
master
November 14, 2024 19:31 1m 37s
spi: pin definitions Scala CI #62: Commit 1227065 pushed by schoeberl
November 12, 2024 22:42 1m 34s master
master
November 12, 2024 22:42 1m 34s
spi: more experiments Scala CI #61: Commit 2d4f6b0 pushed by schoeberl
November 12, 2024 22:20 1m 37s master
master
November 12, 2024 22:20 1m 37s
spi: fix pin definition Scala CI #60: Commit d20374f pushed by schoeberl
November 12, 2024 22:13 1m 45s master
master
November 12, 2024 22:13 1m 45s
spi: add SPI files Scala CI #59: Commit 7bdd8c7 pushed by schoeberl
November 12, 2024 19:54 2m 0s master
master
November 12, 2024 19:54 2m 0s
Switch to Chisel 3.6 and Scala 2.13 Scala CI #58: Commit 31774e0 pushed by schoeberl
November 7, 2024 04:42 3m 56s master
master
November 7, 2024 04:42 3m 56s
comments Scala CI #57: Commit 376622e pushed by schoeberl
August 24, 2024 07:17 3m 45s master
master
August 24, 2024 07:17 3m 45s
Rename Verilog generation Scala CI #56: Commit b4e3fa8 pushed by schoeberl
August 13, 2024 11:12 1m 4s master
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August 13, 2024 11:12 1m 4s
Change to byte addressing Scala CI #55: Commit 93498e2 pushed by schoeberl
August 13, 2024 10:50 1m 2s master
master
August 13, 2024 10:50 1m 2s
Rename CpuInterface to PipeCon Scala CI #54: Commit 7d2ba69 pushed by schoeberl
August 13, 2024 08:33 3m 45s master
master
August 13, 2024 08:33 3m 45s
todo: wrapper code in README Scala CI #53: Commit 86e9586 pushed by schoeberl
June 6, 2024 12:38 2m 25s master
master
June 6, 2024 12:38 2m 25s
soc: arbiter for ready/valid Scala CI #52: Commit 50203b1 pushed by schoeberl
February 25, 2024 17:55 1m 29s master
master
February 25, 2024 17:55 1m 29s