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Dump per macro verilog (overridden by final verilog output) #134
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Currently, there are N verilog files emitted where the
.jaris invoked since there is noOutputFileAnnotation(see misc. Verilog files dumped in Chipyard at the top-level everytime there is a compile). This reuses the output Verilog file that we want to dump the combined Verilog into so that it is used as a temp. file that everything is written to.