Ensure all GPIO signals are tied off

[tymcauley]

Related PRs / Issues:

Resolves #1731.

Type of change:

• Bug fix
• New feature
• Other enhancement

Impact:

• RTL change
• Software change (RISC-V software)
• Build system change
• Other

Contributor Checklist:

• Did you set main as the base branch?
• Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
• Did you state the type-of-change/impact?
• Did you delete any extraneous prints/debugging code?
• Did you mark the PR with a changelog: label?
• (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
• (If applicable) Did you add documentation for the feature?
• (If applicable) Did you add a test demonstrating the PR?

• (If applicable) Did you mark the PR as Please Backport?

[T-K-233]

Look good.
Thanks!

[jerryz123]

LGTM as well, but before we do, the PR to rocket-chip-blocks must be merged.

[tymcauley]

Okay, finally got that rocket-chip-blocks PR merged, thanks @jerryz123. Not sure if the rocket-chip-blocks bump is pulling in more changes than desired now, or if this is okay.

[jerryz123]

This is good, thanks!

[jerryz123]

Ok odd... this broke SPI flash.. I don't think this is related to your changes... but warrants some investigation

[tymcauley]

Ok odd... this broke SPI flash.. I don't think this is related to your changes... but warrants some investigation

I guess this is the first time that this PR is getting pulled into Chipyard, which does touch the SPI controller: chipsalliance/rocket-chip-blocks#25

[jerryz123]

Thanks for chasing down the commit. I've reverted it on rocket-chip-blocks

[tymcauley]

Thanks for chasing down the commit. I've reverted it on rocket-chip-blocks

np! I've merged that change into here, hopefully CI is all fixed now.