Fix/cpld sfs rt + Pull in units updates from FV3 #2467 (#2475)

* UFSWM - Updates cpld_control_sfs to use the most up-to-date configuration specs * UFSWM - Update units attributes in netCDF output to be machine-readable * FV3 - Update units attributes in netCDF output to be machine-readable * atmos_cubed_sphere - Update units attributes in netCDF output to be machine-readable
ufs-community · Nov 5, 2024 · f9c91d3 · f9c91d3
1 parent 547be6d
commit f9c91d3
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Showing 12 changed files with 1,964 additions and 2,550 deletions.
diff --git a/FV3 b/FV3
diff --git a/tests/bl_date.conf b/tests/bl_date.conf
@@ -1 +1 @@
-export BL_DATE=20241028
+export BL_DATE=20241031
diff --git a/tests/logs/RegressionTests_gaea.log b/tests/logs/RegressionTests_gaea.log
diff --git a/tests/logs/RegressionTests_hera.log b/tests/logs/RegressionTests_hera.log
diff --git a/tests/logs/RegressionTests_hercules.log b/tests/logs/RegressionTests_hercules.log
diff --git a/tests/logs/RegressionTests_jet.log b/tests/logs/RegressionTests_jet.log
diff --git a/tests/logs/RegressionTests_orion.log b/tests/logs/RegressionTests_orion.log
diff --git a/tests/logs/RegressionTests_wcoss2.log b/tests/logs/RegressionTests_wcoss2.log
diff --git a/tests/test_changes.list b/tests/test_changes.list
@@ -1,37 +1,154 @@
-cpld_control_p8_mixedmode intel
-cpld_control_gfsv17 intel
-cpld_control_gfsv17_iau intel
-cpld_restart_gfsv17 intel
-cpld_mpi_gfsv17 intel
-cpld_control_sfs intel
-cpld_debug_gfsv17 intel
-cpld_control_p8 intel
-cpld_control_p8.v2.sfc intel
-cpld_restart_p8 intel
-cpld_control_qr_p8 intel
-cpld_restart_qr_p8 intel
-cpld_2threads_p8 intel
-cpld_decomp_p8 intel
-cpld_mpi_p8 intel
-cpld_control_ciceC_p8 intel
-cpld_control_c192_p8 intel
-cpld_restart_c192_p8 intel
-cpld_bmark_p8 intel
-cpld_restart_bmark_p8 intel
-cpld_s2sa_p8 intel
-cpld_control_noaero_p8 intel
-cpld_control_nowave_noaero_p8 intel
-cpld_debug_p8 intel
-cpld_debug_noaero_p8 intel
-cpld_control_c48 intel
-cpld_warmstart_c48 intel
-cpld_restart_c48 intel
-cpld_control_p8_faster intel
-cpld_control_pdlib_p8 intel
-cpld_restart_pdlib_p8 intel
-cpld_mpi_pdlib_p8 intel
-cpld_debug_pdlib_p8 intel
-atm_ds2s_docn_dice intel
-cpld_control_nowave_noaero_p8 gnu
-cpld_control_pdlib_p8 gnu
-cpld_debug_pdlib_p8 gnu
+atm_ds2s_docn_pcice intel  
+atmaero_control_p8 intel  
+atmaero_control_p8_rad intel  
+atmaero_control_p8_rad_micro intel  
+atmwav_control_noaero_p8 intel  
+control_CubedSphereGrid_debug intel  
+control_CubedSphereGrid intel  
+control_CubedSphereGrid_parallel intel  
+control_c48.v2.sfc intel  
+control_c48 gnu  
+control_csawmg_debug gnu  
+control_csawmg_debug intel  
+control_csawmg gnu  
+control_csawmg intel  
+control_debug_p8 gnu  
+control_debug_p8 intel  
+control_diag_debug gnu  
+control_diag_debug intel  
+control_flake gnu  
+control_flake intel  
+control_latlon intel  
+control_lndp_debug intel  
+control_p8_atmlnd_debug intel  
+control_p8_atmlnd intel  
+control_p8_atmlnd_sbs intel  
+control_p8_faster intel  
+control_p8 gnu  
+control_p8_ugwpv1 gnu  
+control_ras_debug gnu  
+control_ras_debug intel  
+control_ras gnu  
+control_ras intel  
+control_stochy_debug gnu  
+control_stochy_debug intel  
+control_stochy gnu  
+control_wam_debug gnu  
+control_wam intel  
+control_wrtGauss_netcdf_parallel_debug intel  
+control_wrtGauss_netcdf_parallel intel  
+conus13km_control gnu  
+conus13km_control intel  
+conus13km_debug_2threads gnu  
+conus13km_debug_2threads intel  
+conus13km_debug gnu  
+conus13km_debug intel  
+conus13km_debug_qr gnu  
+conus13km_debug_qr intel  
+conus13km_radar_tten_debug gnu  
+conus13km_radar_tten_debug intel  
+cpld_2threads_p8 intel  
+cpld_bmark_p8 intel  
+cpld_control_c192_p8 intel  
+cpld_control_c48 intel  
+cpld_control_ciceC_p8 intel  
+cpld_control_gfsv17 intel  
+cpld_control_noaero_p8_agrid intel  
+cpld_control_noaero_p8 intel  
+cpld_control_nowave_noaero_p8 gnu  
+cpld_control_nowave_noaero_p8 intel  
+cpld_control_p8.v2.sfc intel  
+cpld_control_p8 intel  
+cpld_control_p8_mixedmode intel  
+cpld_control_pdlib_p8 gnu  
+cpld_control_qr_p8 intel  
+cpld_control_sfs intel  
+cpld_debug_gfsv17 intel  
+cpld_debug_noaero_p8 intel  
+cpld_debug_p8 intel  
+cpld_debug_pdlib_p8 gnu  
+cpld_decomp_p8 intel  
+cpld_mpi_gfsv17 intel  
+cpld_mpi_p8 intel  
+cpld_regional_atm_fbh intel  
+cpld_s2sa_p8 intel  
+cpld_warmstart_c48 intel  
+gnv1_c96_no_nest_debug gnu  
+gnv1_c96_no_nest_debug intel  
+hafs_global_1nest_atm intel  
+hafs_global_multiple_4nests_atm intel  
+hafs_global_storm_following_1nest_atm intel  
+hafs_regional_1nest_atm intel  
+hafs_regional_atm intel  
+hafs_regional_atm_ocn intel  
+hafs_regional_atm_ocn_wav intel  
+hafs_regional_atm_thompson_gfdlsf intel  
+hafs_regional_atm_wav intel  
+hafs_regional_docn intel  
+hafs_regional_docn_oisst intel  
+hafs_regional_specified_moving_1nest_atm intel  
+hafs_regional_storm_following_1nest_atm intel  
+hafs_regional_storm_following_1nest_atm_ocn_debug intel  
+hafs_regional_storm_following_1nest_atm_ocn intel  
+hafs_regional_storm_following_1nest_atm_ocn_wav_inline intel  
+hafs_regional_storm_following_1nest_atm_ocn_wav intel  
+hafs_regional_storm_following_1nest_atm_ocn_wav_mom6 intel  
+hafs_regional_telescopic_2nests_atm intel  
+hrrr_c3_debug gnu  
+hrrr_c3_debug intel  
+hrrr_control_2threads_dyn32_phy32 intel  
+hrrr_control_debug_dyn32_phy32 gnu  
+hrrr_control_debug_dyn32_phy32 intel  
+hrrr_control_debug gnu  
+hrrr_control_debug intel  
+hrrr_control_decomp_dyn32_phy32 gnu  
+hrrr_control_decomp_dyn32_phy32 intel  
+hrrr_control_decomp gnu  
+hrrr_control_dyn32_phy32 gnu  
+hrrr_control_dyn32_phy32 intel  
+hrrr_control gnu  
+hrrr_control_noqr gnu  
+hrrr_gf_debug gnu  
+hrrr_gf_debug intel  
+rap_2threads_dyn32_phy32 gnu  
+rap_2threads_dyn32_phy32 intel  
+rap_2threads gnu  
+rap_cires_ugwp_debug intel  
+rap_clm_lake_debug gnu  
+rap_clm_lake_debug intel  
+rap_control_debug_dyn32_phy32 gnu  
+rap_control_debug_dyn32_phy32 intel  
+rap_control_debug gnu  
+rap_control_debug intel  
+rap_control_dyn32_phy32 gnu  
+rap_control_dyn32_phy32 intel  
+rap_control_dyn64_phy32_debug gnu  
+rap_control_dyn64_phy32_debug intel  
+rap_control_dyn64_phy32 gnu  
+rap_control_dyn64_phy32 intel  
+rap_control gnu  
+rap_decomp gnu  
+rap_diag_debug gnu  
+rap_diag_debug intel  
+rap_flake_debug gnu  
+rap_flake_debug intel  
+rap_lndp_debug intel  
+rap_noah_debug intel  
+rap_noah_sfcdiff_cires_ugwp_debug gnu  
+rap_noah_sfcdiff_cires_ugwp_debug intel  
+rap_progcld_thompson_debug gnu  
+rap_progcld_thompson_debug intel  
+rap_sfcdiff_debug intel  
+rap_sfcdiff_decomp gnu  
+rap_sfcdiff gnu  
+rap_unified_drag_suite_debug intel  
+rap_unified_ugwp_debug intel  
+regional_atmaq_debug intel  
+regional_control_faster intel  
+regional_debug gnu  
+regional_debug intel  
+regional_spp_sppt_shum_skeb_dyn32_phy32 intel  
+rrfs_v1beta_debug gnu  
+rrfs_v1beta_debug intel  
+rrfs_v1beta gnu  
+rrfs_v1nssl_nohailnoccn intel  
diff --git a/tests/tests/cpld_control_pdlib_p8 b/tests/tests/cpld_control_pdlib_p8
@@ -109,6 +109,10 @@ if [[ $MACHINE_ID = orion ]] || [[ $RT_COMPILER = gnu ]]; then
   WLCLK=50
 fi
 
+if [[ $MACHINE_ID = jet ]]; then
+  WLCLK=50
+fi
+
 export K_SPLIT=4
 export N_SPLIT=5
 

diff --git a/tests/tests/cpld_control_sfs b/tests/tests/cpld_control_sfs
@@ -88,6 +88,9 @@ fi
 export K_SPLIT=2
 export N_SPLIT=5
 
+export NUDGE_QV=.false.
+export VTDM4=0.05
+
 # HR4 GFSv17 GWD update
 export DO_GWD_OPT_PSL=.true.
 export DO_GSL_DRAG_SS=.false.
diff --git a/tests/tests/cpld_mpi_pdlib_p8 b/tests/tests/cpld_mpi_pdlib_p8
@@ -114,7 +114,7 @@ export N_SPLIT=5
 export DO_GWD_OPT_PSL=.true.
 export DO_GSL_DRAG_SS=.false.
 
-if [[ $MACHINE_ID = hera ]] || [[ $MACHINE_ID = orion ]]; then
+if [[ $MACHINE_ID = hera ]] || [[ $MACHINE_ID = orion ]] || [[ $MACHINE_ID = jet ]]; then
   WLCLK=50
 fi
 if [[ $MACHINE_ID = wcoss2 ]]; then