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ace: gpdma: power down routine #54505
ace: gpdma: power down routine #54505
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The changes look good.
I'd really love to see a test verifying this power logic as part of the change set.
So something like...
- verify dma is powered off on start
- verify on start dma is clock enabled and powered on
- verify on stop dma is clock gated and powered off
- verify repeated configure/start/stops doesn't break anything.
Perhaps a slight modification of the memory to memory test could do this testing selectively given the particular DMA supports PM and PM is enabled.
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Blocking just to not accidentally merge without dma_ctx init fix, example:
thesofproject@9c22efe
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@abonislawski fixed in newest version |
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Adding function that is allowing to release ownership of the DMA. When DSP is no longer using dma instance it ownership can be released. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
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@tmleman let me know when I should retry/retest, happy to do so |
This patch is adding function enabling DMA clock gating. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch modifies the existing loop transfer test to allow testing for device power state changes when starting and stopping a transfer. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Adding meteorlake board overlay. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
CAVS platforms are not fully integrated with zephyr. Some of the registers are still programed from SOF side. This feature can be enabled for those platforms later when integration is fully done. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
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@teburd unfortunately you won't be able to test it on any CAVS platform. First problem is that builds with enabled PM doesn't work (those without SOF) #56415. And second one is that in case of a TGL some registers are still programed from SOF side. I made comparison with closed source version and power management aspects of those drivers does not match to each other. Those features are needed for ACE and I don't want to invest more time into CAVS version. I will make SOF build with those changes and run test on it. |
I have tested FW with those changes on MTL and TGL. I didn't find any issue. |
@ceolin please take a look |
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Verified working on cavs25 using the dma loopback test without PM enabled
We want to power up GPDMA only when we are planning to use it. Device power manager (PM) will wake up the power domain and then power up the DMA instance. When device is no longer in use, PM can disable device and allow the power domain to enter power gaiting state.