feat(perf): Remove useless paired RC instructions within a block during DIE

[vezenovm]

Description

Problem*

Resolves

Part of general effort to reduce Brillig bytecode sizes.

Summary*

We currently have a pass for removing paired inc_rc and dec_rc instructions as long as there is no array set to an array of the same type between them. However, this is pass only checks the first block for inc_rc instructions and the return block for dec_rc instructions. This is because during SSA gen we add inc_rc instructions on array function parameters and dec_rc parameters when we exit the function scope, so this pass still allows us to get rid of a lot of instructions. However, function scope entry and exit are not the only places we add inc_rc instructions. And once we inline functions and go through other SSA opts, it is common to have inc_rc and dec_rc instructions through a block.

e.g. This is the SSA of the return block of execution_success/poseidon2:

  b4():
    v17 = load v10
    v19 = call poseidon2_permutation(v17, u32 4)
    inc_rc v19
    dec_rc v19
    inc_rc v19
    v20 = array_get v19, index u32 0
    dec_rc v19
    constrain v20 == v1
    return 

All of those inc_rc/dec_rc pairs are useless and we should be able to remove them.

This PR removes paired inc_rc/dec_rc instructions per block when there is not an array set to an array of the same type between them.
The return block of execution_success/poseidon2 after this PR is the following:

  b4():
    v17 = load v10
    v19 = call poseidon2_permutation(v17, u32 4)
    v20 = array_get v19, index u32 0
    constrain v20 == v1
    return 

Additional Context

Right now I just focused on removing these inc_rc/dec_rc instructions per block for simplicity. Removing them across blocks is more complex and that work can come in a follow-up.

Documentation*

Check one:

• No documentation needed.
• Documentation included in this PR.
• [For Experimental Features] Documentation to be submitted in a separate PR.

PR Checklist*

• I have tested the changes locally.
• I have formatted the changes with Prettier and/or cargo fmt on default settings.

[github-actions]

Changes to Brillig bytecode sizes

Generated at commit: d9f679cf97fa9a8c5a75f3a9faf03fbc20e9fc42, compared to commit: 33d6c8c77a2a0dc670da8811549ae4f5feaa4894

🧾 Summary (10% most significant diffs)

Program	Brillig opcodes (+/-)	%
bench_2_to_17	-18 ✅	-5.71%
fold_2_to_17	-36 ✅	-6.35%
conditional_regression_661	-12 ✅	-9.38%

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Full diff report 👇

Program	Brillig opcodes (+/-)	%
eddsa	11,629 (-30)	-0.26%
regression_5252	5,351 (-18)	-0.34%
brillig_keccak	1,753 (-24)	-1.35%
keccak256	1,753 (-24)	-1.35%
uhashmap	24,251 (-414)	-1.68%
brillig_rc_regression_6123	187 (-6)	-3.11%
hashmap	27,163 (-1,032)	-3.66%
fold_numeric_generic_poseidon	709 (-36)	-4.83%
no_predicates_numeric_generic_poseidon	709 (-36)	-4.83%
poseidon2	300 (-18)	-5.66%
bench_2_to_17	297 (-18)	-5.71%
fold_2_to_17	531 (-36)	-6.35%
conditional_regression_661	116 (-12)	-9.38%