A JSON library implemented in VHDL.

Portable HyperRAM controller

VHDL , ModelSIM, Quartus, FPGA, Image Processing

💻 Simulation for the architecture of a processor inspired by the ideas of PDP-11 processor

DSSS Wireless transmit-receive system in VHDL

The source codes used in the blog post available at: https://rayanfam.com/topics/hardware-design-stack/

Utilities for Avalon Memory Map

A simulation to PDP-11 microprocessor with modelsim, The design is a micro-programmed based with an average of 9 clock cycles per instruction.

A simplified version of PDP11 instruction set architecture (ISA) using VHDL.

VHDL examples for a different kind of topics

ieee_proposed with names changed to floatfixlib to be compatible with Quartus Prime Lite and support fixed, float, etc.

UART Protocol made for Altera DE2-115 FPGA in VHDL

Building a simple frame decoder chip for a vending machine from scratch using VHDL and Alliance CAD tools

This Repository contains custom-defined (AUBIE) processor components as defined by the ModelSimPE VHDL([Very High Speed Integrated Circuit] Hardware Description Language) Simulation Environment

FSM and Cache design for practicing the concepts of computer architecture

digital electronics components implementation in VHDL

Ein 2-Kanal-Funktionsgenerator mittels Direct Digital Synthesis (DDS). Erstellt als Gruppenprojekt für das Modul BTE5024 – Anwendungen elektronischer Systeme.

small microprocessor based on PDP11 using VHDL

Teamwork project made during the course "Elettronica dei Sistemi Digital" (Electronics of Integrated Systems) @ Politecnico di Torino

Implement algorithm AES in VHDL to Digital Systems subject.