Chipyard 1.12.0

Added

• Support BINARIES_DIR make flag (by @jerryz123 in #1773)
• Add large boom cospike config (by @joonho3020 in #1786)
• Enable debug SBA on all default designs (by @jerryz123 in #1763)
• Allow passing BINARY_ARGS to target binaries (pk) (by @jerryz123 in #1792)
• Add example rocket-chip-blocks timer integration (by @jerryz123 in #1793)
• Add support for building CIRCT from source (by @jerryz123 in #1806)
• Bump constellation - adds support for inlining noc routers (by @jerryz123 in #1809)
• Add GPIOPunchthrough harnessbinder (by @jerryz123 in #1823)
• EXT_FILELISTS and EXT_INCDIR APIs for including external verilog projects (by @jerryz123 in #1832)
• Add EmptyChipTop example (by @jerryz123 in #1845)
• add sv39 fragments (by @joonho3020 in #1874)
• Support Chisel6 for RTL-sim/VLSI/FPGA flows (by @jerryz123 in #1854)
• Add GCD IOBinders examples (by @jerryz123 in #1884)
• Integrate ReRoCC (by @jerryz123 in #1783)
• Generate a log file of the CIRCT output (by @jerryz123 in #1899)
• Add compress-acc (by @joonho3020 in #1906)
• Add DMI Bridge to FireSim (by @soohyuk-cho in #1852)
• Add makefile flag to disable binary disassembly during sims (by @jerryz123 in #1921)

Changed

• Improve GCD example (by @jerryz123 in #1757)
• Update MMIO peripheral docs (by @jerryz123 in #1774)
• Bump to latest rocket-chip (by @jerryz123 in #1770)
• CHANGE: Organize abstract config into sections and change comment format to docstrings (by @T-K-233 in #1722)
• Bump to Verilator v5.022 (by @vighneshiyer in #1800)
• Bump testchipip for improved TLSerdesser (by @jerryz123 in #1768)
• REFACTOR: minor fix on code styling (by @T-K-233 in #1815)
• REFACTOR: rearrange gitsubmodule list to match directory order (by @T-K-233 in #1813)
• Add PD-optimized variant of boom (by @jerryz123 in #1816)
• Bump rocket-chip to standalone diplomacy (by @jerryz123 in #1818)
• Bump to gcc 13 (by @vighneshiyer in #1802)
• Use SV48 when possible (by @abejgonzalez in #1847)
• Flatten barstools into Chipyard (by @jerryz123 in #1855)
• Automatically set DTSTimebase to PBUS frequency (by @abejgonzalez in #1856)
• Bump firesim to version with detached build.sbt (by @jerryz123 in #1864)
• add upper bound for python version to avoid incompatible packages (by @bwhitchurch in #1898)
• Bump FireMarshal (by @abejgonzalez in #1903)
• Update checkpointing script (by @abejgonzalez in #1909)
• Update rocket-chip with modern diplomacy/prci packaging (by @jerryz123 in #1895)
• Non-recursive clone of compress-acc (by @jerryz123 in #1910)
• Bump rc/components to improve module naming (by @jerryz123 in #1894)
• Bump rocc-acc-utils for updated logger (by @abejgonzalez in #1917)
• Bump rocket-chip/submods for reorganized rocket configs (by @jerryz123 in #1914)
• Update testchipip for bootrom that clears MIP (by @jerryz123 in #1923)
• Bump to chisel 6.5.0 (by @jerryz123 in #1927)

Fixed

• Fix unnecessary runs/rebuilds of RTL simulators (by @jerryz123 in #1758)
• Fix submodule recusive cloning (by @jerryz123 in #1765)
• Fix invalid escape sequences (by @tymcauley in #1798)
• docs: Update FireSim docs (by @geekLucian in #1795)
• Fix Gemmini Spike test in CI + Fix FireMarshal launch jobs erroring (by @abejgonzalez in #1804)
• FIX: Change default UART FIFO size and combine UART Config fragments (by @T-K-233 in #1683)
• Fix InitZero example + add to CI (by @jerryz123 in #1826)
• Fix driver dts issues (align w/ RTL) (by @abejgonzalez in #1837)
• Bump FireMarshal (by @abejgonzalez in #1840)
• Bump rc w/ tile interrupt fix (by @joonho3020 in #1841)
• Update build-toolchain-extra.sh (by @abejgonzalez in #1848)
• Update MultiHarnessBinders to connect differently typed ports + Ignore TLMonitors on DigitalTop scope (by @abejgonzalez in #1868)
• Fix classpath_cache bug (by @jerryz123 in #1880)
• Fix clock name and macro paths for Sky130 VLSI flow (by @nayiri-k in #1882)
• Name all the generated ClockDomains (by @jerryz123 in #1891)
• Bump FireMarshal + PK (Pk bumped to fix toolchain bump issues w/ linux) (by @abejgonzalez in #1905)

Removed

• Remove useless conda env sourcing (by @joonho3020 in #1759)
• Remove legacy SFC flags (by @jerryz123 in #1859)
• Remove tapeout.GenerateModelStageMain (by @jerryz123 in #1860)

Uncategorized

• Fix typo in build-setup.sh (by @buggy213 in #1760)
• vlsi/Makefile: truncate file SRAM_GENERATOR_CONF (by @oharboe in #1778)
• Switch update-circt action to v1 (by @seldridge in #1788)
• Ensure all GPIO signals are tied off (by @tymcauley in #1732)
• Enabling JTAG Debuging in VCU118 FPGA changelog:added (by @ksungkeun84 in #1796)
• Bump boom to fix Chisel 6 compatibility (by @tymcauley in #1820)
• fix: Link conda lib during CIRCT build (by @geekLucian in #1824)
• Fix missing step in documentation. (by @gonsolo in #1830)
• Spelling fix. (by @gonsolo in #1833)
• [docs] Fix sim output executable name usage in docs (NFC) (by @eymay in #1858)
• Spelling fixes. (by @gonsolo in #1862)
• Improve insert includes (by @bwhitchurch in #1902)
• Bump firesim (by @joonho3020 in #1913)
• Add configuration for MegaBoom that uses SimBlockDevice (by @eszpotanski in #1924)

Full Changelog: 1.11.0...1.12.0